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參數(shù)資料
| 型號： | SSTUB32S869BHLFT |
| 廠商： | IDT, Integrated Device Technology Inc |
| 文件頁數(shù)： | 6/17頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC REGIST BUFF 14BIT DDR2 150BGA |
| 產(chǎn)品變化通告： | Product Discontinuation 09/Dec/2011 |
| 標(biāo)準(zhǔn)包裝： | 2,000 |
| 類型： | 緩沖器 |
| Tx/Rx類型： | LVCMOS |
| 延遲時間： | 3.0ns |
| 電容 - 輸入： | 3.5pF |
| 電源電壓： | 1.7 V ~ 1.9 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 150-TFBGA |
| 供應(yīng)商設(shè)備封裝： | 150-CABGA（8x13） |
| 包裝： | 帶卷 (TR) |
14
ICSSSTUB32S869B
Advance Information
1203—04/11/06
Output slew rate measurement information (VDD =1.8 V±0.1V)
All input pulses are supplied by generators having the following characteristics: PRR
10 MHz;
Zo =50 ; input slew rate = 1 V/ns ± 20%, unless otherwise specified.
(1) CL includes probe and jig capacitance.
Figure 12 — Load circuit, HIGH-to-LOW slew measurement
Figure 13 — Voltage waveforms, HIGH-to-LOW slew rate measurement
(1) CL includes probe and jig capacitance.
Figure 14 — Load circuit, LOW-to-HIGH slew measurement
Figure 15 — Voltage waveforms, LOW-to-HIGH slew rate measurement
CL = 10 pF
SEE NOTE (1)
VDD
OUT
DUT
TEST POINT
RL = 50
002aaa377
VOH
VOL
OUTPUT
80%
20%
dv_f
dt_f
002aaa378
CL = 10 pF
SEE NOTE (1)
OUT
DUT
TEST POINT
RL = 50
002aaa379
VOH
VOL
80%
20%
dv_r
dt_r
OUTPUT
002aaa380
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