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參數(shù)資料
| 型號： | SST89E54RC-33-C-PIE |
| 廠商： | Microchip Technology |
| 文件頁數(shù)： | 67/71頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 8BIT 17KB FLASH 40PDIP |
| 標準包裝： | 9 |
| 系列： | FlashFlex® |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，UART/USART |
| 外圍設備： | POR，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器容量： | 16KB（16K x 8） |
| 程序存儲器類型： | 閃存 |
| EEPROM 大?。?/td> | 1K x 8 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 外部 |
| 工作溫度： | 0°C ~ 70°C |
| 封裝/外殼： | 40-DIP（0.600"，15.24mm） |
| 包裝： | 管件 |
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2011 Silicon Storage Technology, Inc.
DS25088A
10/11
7
FlashFlex MCU
SST89E52RC / SST89E54RC
Data Sheet
A Microchip Technology Company
P3[6]
O
WR#: External Data Memory Write strobe
P3[7]
O
RD#: External Data Memory Read strobe
PSEN#
I/O
Program Store Enable: PSEN# is the Read strobe to external program. When the
device is executing from internal program memory, PSEN# is inactive (High). When
the device is executing code from external program memory, PSEN# is activated
twice each machine cycle, except that two PSEN# activations are skipped during
each access to external data memory. A forced high-to-low input transition on the
PSEN# pin while the RST input is continually held high for more than 10 machine
cycles will cause the device to enter external host mode programming.
RST
I
Reset: While the oscillator is running, a “high” logic state on this pin for two
machine cycles will reset the device. If the PSEN# pin is driven by a high-to-low
input transition while the RST input pin is held “high,” the device will enter the exter-
nal host mode, otherwise the device will enter the normal operation mode.
EA#
I
External Access Enable: EA# must be connected to VSS in order to enable the
device to fetch code from the external program memory. EA# must be strapped to
VDD for internal program execution. However, Disable-Extern-Boot (See Section ,
“Security Lock”) will disable EA#, and program execution is only possible from
internal program memory. The EA# pin can tolerate a high voltage2 of 12V. (See
Section , “Electrical Specification”)
ALE/
PROG#
I/O
Address Latch Enable: ALE is the output signal for latching the low byte of the
address during an access to external memory. This pin is also the programming
pulse input (PROG#) for flash programming. Normally the ALE3 is emitted at a con-
stant rate of 1/6 the crystal frequency4 and can be used for external timing and
clocking. One ALE pulse is skipped during each access to external data memory.
However, if AO is set to 1, ALE is disabled.
(See “Auxiliary Register (AUXR)” in Section , “Special Function Registers”)
NC
I/O
No Connect
XTAL1
I
Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
XTAL2
O
Crystal 2: Output from the inverting oscillator amplifier.
VDD
I
Power Supply
VSS
I
Ground
T0-0.0 25008
1. I = Input; O = Output
2. It is not necessary to receive a 12V programming supply voltage during flash programming.
3.ALE loading issue: When ALE pin experiences higher loading (>30pf) during the reset, the MCU may accidentally enter
into modes other than normal working mode. The solution is to add a pull-up resistor of 3-50 K
to V
DD, e.g. for ALE
pin.
4. For 6 clock mode, ALE is emitted at 1/3 of crystal frequency.
Table 1: Pin Descriptions (Continued) (2 of 2)
Symbol
Type1
Name and Functions
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相關代理商/技術參數(shù) |
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|---|---|
| SST89E54RD | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex MCU |
| SST89E54RD2 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E54RD2/RD | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E54RD2-33-C-NI | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
| SST89E54RD2-33-C-NIE1 | 制造商:SST 制造商全稱:Silicon Storage Technology, Inc 功能描述:FlashFlex51 MCU |
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