參數(shù)資料
型號： SST89E54RC-33-C-PIE
廠商： Microchip Technology
文件頁數(shù)： 33/71頁
文件大?。?/td> 0K
描述： IC MCU 8BIT 17KB FLASH 40PDIP
標準包裝： 9
系列： FlashFlex®
核心處理器： 8051
芯體尺寸： 8-位
速度： 33MHz
連通性： EBI/EMI，UART/USART
外圍設備： POR，WDT
輸入/輸出數(shù)： 32
程序存儲器容量： 16KB（16K x 8）
程序存儲器類型： 閃存
EEPROM 大小： 1K x 8
RAM 容量： 512 x 8
電壓 - 電源 (Vcc/Vdd)： 4.5 V ~ 5.5 V
振蕩器型： 外部
工作溫度： 0°C ~ 70°C
封裝/外殼： 40-DIP（0.600"，15.24mm）
包裝： 管件
2011 Silicon Storage Technology, Inc.
DS25088A
10/11
39
FlashFlex MCU
SST89E52RC / SST89E54RC
Data Sheet
A Microchip Technology Company
Automatic Address Recognition
Automatic Address Recognition helps to reduce the MCU time and power required to talk to multiple
serial devices. Each device is hooked together sharing the same serial link with its own address. In this
configuration, a device is only interrupted when it receives its own address, thus eliminating the soft-
ware overhead to compare addresses.
This same feature helps to save power because it can be used in conjunction with idle mode to reduce
the system’s overall power consumption. Since there may be multiple slaves hooked up serial to one
master, only one slave would have to be interrupted from idle mode to respond to the master’s trans-
mission. Automatic Address Recognition (AAR) allows the other slaves to remain in idle mode while
only one is interrupted. By limiting the number of interruptions, the total current draw on the system is
reduced.
There are two ways to communicate with slaves: a group of them at once, or all of them at once. To
communicate with a group of slaves, the master sends out an address called the given address. To
communicate with all the slaves, the master sends out an address called the “broadcast” address.
AAR can be configured as mode 2 or 3 (9-bit modes) and setting the SM2 bit in SCON. Each slave has
its own SM2 bit set waiting for an address byte (9th bit = 1). The Receive Interrupt (RI) flag will only be
set when the received byte matches either the given address or the broadcast address. Next, the slave
then clears its SM2 bit to enable reception of the data bytes (9th bit = 0) from the master. When the 9th
bit = 1, the master is sending an address. When the 9th bit = 0, the master is sending actual data.
If mode 1 is used, the stop bit takes the place of the 9th bit. Bit RI is set only when the received com-
mand frame address matches the device’s address and is terminated by a valid stop bit. Note that
mode 0 cannot be used. Setting SM2 bit in the SCON register in mode 0 will have no effect.
Each slave’s individual address is specified by SFR SADDR. SFR SADEN is a mask byte that defines
“don’t care” bits to form the given address when combined with SADDR. See the example below:
Slave 1
SADDR
=
1111 0001
SADEN
=
1111 1010
GIVEN
=
1111 0X0X
Slave 2
SADDR
=
1111 0011
SADEN
=
1111 1001
GIVEN
=
1111 0XX1
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