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參數(shù)資料
| 型號： | SPAK56F802TA60 |
| 廠商： | MOTOROLA INC |
| 元件分類： | 數(shù)字信號處理 |
| 英文描述： | 0-BIT, 60 MHz, OTHER DSP, PQFP32 |
| 封裝： | 7 X 7 MM, 0.80 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 25/39頁 |
| 文件大?。?/td> | 573K |
| 代理商： | SPAK56F802TA60 |
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Electrical Design Considerations
MOTOROLA
56F802 Technical Data
31
Consider all device loads as well as parasitic capacitance due to PCB traces when calculating
capacitance. This is especially critical in systems with higher capacitive loads that could create
higher transient currents in the VDD and GND circuits.
Take special care to minimize noise levels on the VREF, VDDA and VSSA pins.
Designs that utilize the TRST pin for JTAG port or OnCE module functionality (such as
development or debugging systems) should allow a means to assert TRST whenever RESET is
asserted, as well as a means to assert TRST independently of RESET. TRST must be asserted at
power up for proper operation. Designs that do not require debugging functionality, such as
consumer products, TRST should be tied low.
Because the Flash memory is programmed through the JTAG/OnCE port, designers should provide
an interface to this port to allow in-circuit Flash programming.
Part 6 Ordering Information
Table 27 lists the pertinent information needed to place an order. Consult a Motorola Semiconductor sales
office or authorized distributor to determine availability and to order parts.
Table 27. 56F802 Ordering Information
Part
Supply
Voltage
Package Type
Pin
Count
Frequency
(MHz)
Order Number
56F802
3.0–3.6 V
Low Profile Plastic Quad Flat Pack
(LQFP)
32
80
DSP56F802TA80
56F802
3.0–3.6 V
Low Profile Plastic Quad Flat Pack
(LQFP)
32
60
DSP56F802TA60
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