參數(shù)資料
型號(hào)： SPAK56F802TA60
廠商： MOTOROLA INC
元件分類(lèi)： 數(shù)字信號(hào)處理
英文描述： 0-BIT, 60 MHz, OTHER DSP, PQFP32
封裝： 7 X 7 MM, 0.80 MM PITCH, 1.40 MM HEIGHT, PLASTIC, LQFP-32
文件頁(yè)數(shù)： 12/39頁(yè)
文件大?。?/td> 573K
代理商： SPAK56F802TA60
2
56F802 Technical Data
MOTOROLA
Part 1 Overview
1.1 56F802 Features
1.1.1
Digital Signal Processing Core
Efficient 16-bit 56800 family hybrid controller engine with dual Harvard architecture
As many as 40 Million Instructions Per Second (MIPS) at 80 MHz core frequency
Single-cycle 16
× 16-bit parallel Multiplier-Accumulator (MAC)
Two 36-bit accumulators including extension bits
16-bit bidirectional barrel shifter
Parallel instruction set with unique DSP addressing modes
Hardware DO and REP loops
Three internal address buses and one external address bus
Four internal data buses and one external data bus
Instruction set supports both DSP and controller functions
Controller style addressing modes and instructions for compact code
Efficient C compiler and local variable support
Software subroutine and interrupt stack with depth limited only by memory
JTAG/OnCE debug programming interface
1.1.2
Memory
Harvard architecture permits as many as three simultaneous accesses to program and data memory
On-chip memory including a low-cost, high-volume Flash solution
— 8K
× 16 bit words of Program Flash
— 1K
× 16-bit words of Program RAM
— 2K
× 16-bit words of Data Flash
— 1K
× 16-bit words of Data RAM
— 2K
× 16-bit words of Boot Flash
Programmable Boot Flash supports customized boot code and field upgrades of stored code through
a variety of interfaces (JTAG)
1.1.3
Peripheral Circuits for 56F802
Pulse Width Modulator (PWM) with six PWM outputs with deadtime insertion and fault protection;
supports both center- and edge-aligned modes
Two 12-bit, Analog-to-Digital Converters (ADCs), 1 x 2 channel and 1 x 3 channel, which support
two simultaneous conversions; ADC and PWM modules can be synchronized
Two General Purpose Quad Timers with two external pins (or two GPIO)
Serial Communication Interface (SCI) with two pins (or two GPIO)
Four multiplexed General Purpose I/O (GPIO) pins
相關(guān)PDF資料
PDF描述
SPAK56F805FV80 16-BIT, 8 MHz, OTHER DSP, PQFP144
SPAK56F807VF80 16-BIT, 80 MHz, OTHER DSP, PBGA160
SPAK56F807VF80 16-BIT, 80 MHz, OTHER DSP, PBGA160
SPAK56F826BU80 16-BIT, 80 MHz, OTHER DSP, PQFP100
SPAK56F8346FV60 16-BIT, 240 MHz, OTHER DSP, PQFP144
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SPAK56F803BU80 制造商:Freescale Semiconductor 功能描述:
SPAK56F805FV80 制造商:Freescale Semiconductor 功能描述:
SPAKDSP303AG100 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC SPAKDSP303AG100 RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
SPAKDSP303GC100 制造商:Motorola Inc 功能描述:
SPAKDSP303VF100 功能描述:IC DSP 24BIT 100MHZ 196-MAPBGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號(hào)處理器） 系列:DSP563xx 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類(lèi)型:定點(diǎn) 接口:I²C，McASP，McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類(lèi)型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA（27x27） 包裝:托盤(pán) 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫(xiě)一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*