參數(shù)資料
型號(hào)： SN260Q
廠商： STMICROELECTRONICS
元件分類： 微控制器/微處理器
英文描述： LOCAL AREA NETWORK CONTROLLER, QCC40
封裝： 6 X 6 MM, 0.90 MM HEIGHT, ROHS COMPLIANT, MQ220, QFN-40
文件頁(yè)數(shù)： 8/47頁(yè)
文件大?。?/td> 1592K
代理商： SN260Q
Functional description
SN260
6.3
Integrated MAC module
The SN260 integrates critical portions of the IEEE 802.15.4-2003 MAC requirements in
hardware. This allows the SN260 to provide greater bandwidth to application and network
operations. In addition, the hardware acts as a first-line filter for non-intended packets. The
SN260 MAC utilizes a DMA interface to RAM memory to further reduce the overall
microcontroller interaction when transmitting or receiving packets.
When a packet is ready for transmission, the software configures the TX MAC DMA by
indicating the packet buffer RAM location. The MAC waits for the backoff period, then
transitions the baseband to TX mode and performs channel assessment. When the channel
is clear, the MAC reads data from the RAM buffer, calculates the CRC, and provides 4-bit
symbols to the baseband. When the final byte has been read and sent to the baseband, the
CRC remainder is read and transmitted.
The MAC resides in RX mode most of the time, and different format and address filters keep
non-intended packets from using excessive RAM buffers, as well as preventing the SN260
CPU from being interrupted. When the reception of a packet begins, the MAC reads 4-bit
symbols from the baseband and calculates the CRC. It assembles the received data for
storage in a RAM buffer. A RX MAC DMA provides direct access to the RAM memory. Once
the packet has been received, additional data is appended to the end of the packet in the
RAM buffer space. The appended data provides statistical information on the packet for the
software stack.
The primary features of the MAC are:
●
CRC generation, appending, and checking
●
Hardware timers and interrupts to achieve the MAC symbol timing
●
Automatic preamble, and SFD pre-pended to a TX packet
●
Address recognition and packet filtering on received packets
●
Automatic acknowledgement transmission
●
Automatic transmission of packets from memory
●
Automatic transmission after backoff time if channel is clear (CCA)
●
Automatic acknowledgement checking
●
Time stamping of received and transmitted messages
●
Attaching packet information to received packets (LQI, RSSI, gain, time stamp, and
packet status)
●
IEEE 802.15.4-2003 timing and slotted/unslotted timing
6.4
Packet trace interface (PTI)
The SN260 integrates a true PHY-level PTI for effective network-level debugging. This two-
signal interface monitors all the PHY TX and RX packets (in a non-intrusive manner)
between the MAC and baseband modules. It is an asynchronous 500 kbps interface and
cannot be used to inject packets into the PHY/MAC interface. The two signals from the
SN260 are the frame signal (PTI_EN) and the data signal (PTI_DATA). The PTI is supported
by InSight Desktop.
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