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參數(shù)資料
| 型號： | SN260Q |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | LOCAL AREA NETWORK CONTROLLER, QCC40 |
| 封裝： | 6 X 6 MM, 0.90 MM HEIGHT, ROHS COMPLIANT, MQ220, QFN-40 |
| 文件頁數(shù)： | 2/47頁 |
| 文件大小： | 1592K |
| 代理商： | SN260Q |
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Pin assignment
SN260
15
nSSEL_INT
I
SPI Slave Select Interrupt (from Host to SN260)
This signal must be connected to nSSEL (Pin 21)
nCTS
I
UART Clear To Send (enables SN260 transmission)
When using the UART interface, this signal should be left
unconnected if not used.
16
N.C.
I
When using the SPI interface, this signal is left not connected.
nRTS
O
UART Request To Send (enables Host transmission)
When using the UART interface, this signal should be left
unconnected if not used.
17
MOSI
I
SPI Data, Master Out / Slave In (from Host to SN260)
N.C.
I
When using the UART interface, this signal is left not connected.
18
MISO
O
SPI Data, Master In / Slave Out (from SN260 to Host)
N.C.
I
When using the UART interface, this signal is left not connected.
19
VDD_PADS
Power
Pads supply (2.1 – 3.6V)
20
SCLK
I
SPI Clock (from Host to SN260)
N.C.
I
When using the UART interface, this signal is left not connected.
21
nSSEL
I
SPI Slave Select (from Host to SN260)
N.C.
I
When using the UART interface, this signal is left not connected.
22
PTI_EN
O
Frame signal of Packet Trace Interface (PTI)
23
PTI_DATA
O
Data signal of Packet Trace Interface (PTI)
24
VDD_PADS
Power
Pads supply (2.1 – 3.6V)
25
N.C.
I
When using the SPI interface, this signal is left not connected.
TXD
O
UART Transmitted Data (from SN260 to Host)
26
nHOST_INT
O
Host Interrupt signal (from SN260 to Host)
RXD
I
UART Received Data (from Host to SN260)
27
SIF_CLK
I
Programming and Debug Interface, Clock (internal pull down)
28
SIF_MISO
O
Programming and Debug Interface, Master In / Slave Out
29
SIF_MOSI
I
Programming and Debug Interface, Master Out / Slave In (external
pull-down re-quired to guarantee state in Deep Sleep Mode)
30
nSIF_LOAD
I/O
Programming and Debug Interface, load strobe (open collector with
internal pull up)
31
GND
Power
Ground supply
VDD_FLASH
Power
1.8V Flash memory supply
33
SDBG
O
Spare Debug signal
34
LINK_ACTIVITY
O
Link and Activity signal
35
nWAKE
I
Wake Interrupt signal (from Host to SN260)
N.C.
I
When using the UART interface, this signal is left not connected.
36
VDD_CORE
Power
1.8V digital core supply
37
VDD_SYNTH_PRE
Power
1.8V synthesizer and pre-scalar supply
Table 2.
Pin descriptions (continued)
Pin #
Signal
Direction
Description
相關PDF資料 |
PDF描述 |
|---|---|
| SN54128J | TTL/H/L SERIES, QUAD 2-INPUT NOR GATE, CDIP14 |
| SNJ54128W | TTL/H/L SERIES, QUAD 2-INPUT NOR GATE, CDFP14 |
| SN54132J | TTL/H/L SERIES, QUAD 2-INPUT NAND GATE, CDIP14 |
| SN74S132N3 | S SERIES, QUAD 2-INPUT NAND GATE, PDIP14 |
| SN54175W | TTL/H/L SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP16 |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN260QT | 功能描述:射頻收發(fā)器 ZIGBEE 802.15.4 NETWORK PROCESSOR RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| SN2634 | 制造商:Omron Corporation 功能描述:RELAY ASSEMBLY |
| SN26500PWR | 制造商:Texas Instruments 功能描述: |
| SN27210DRKR | 制造商:Texas Instruments 功能描述:Custom firmware of BQ27210 |
| SN27322 | 制造商:Texas Instruments 功能描述: |
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