參數(shù)資料
型號(hào): SL811S
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 總線控制器
英文描述: USB Dual Speed Slave Controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC28
封裝: PLASTIC, LCC-28
文件頁(yè)數(shù): 23/27頁(yè)
文件大小: 181K
代理商: SL811S
SL811S/T
Document #: 38-08009 Rev. **
Page 23 of 27
7.5.2
I/O Read Cycle
Note:
11.
nCS can be held low for multiple Read cycles providing the nRD line is cycled. I/O Write Cycle Time in Auto Inc Mode is 150 ns minimum.
Parameter
Description
Min.
Typical
Max.
twr
Write pulse width
65 ns
trd
Read pulse width
65 ns
twcsu
Chip select set-up to nWR
0 ns
twasu
A0 address set-up time
65 ns
twahld
A0 address hold time
10 ns
twdsu
Data to write high set-up time
10 ns
twdhld
Data hold time after write high
5 ns
tracc
Data valid after read low
20 ns
25 ns
trdhld
Data hold after read high
5 ns
trcsu
Chip select low to read low
0 ns
trshld
Tcscs
[11]
Chip select hold after read high
nCS inactive to nCS asserted
[11]
0 ns
85 ns
nRD
A0
D0-D7
DATA
twr
twahld
twdhld
twasu
twdsu
trdhld
I/O Read Cycle from Register or Memory Buffer
Register or Memory
Address
trdp
nWR
trshld
trcsu
nCS
tracc
Tcscs *Note
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