參數(shù)資料
型號: SL811S
廠商: CYPRESS SEMICONDUCTOR CORP
元件分類: 總線控制器
英文描述: USB Dual Speed Slave Controller
中文描述: UNIVERSAL SERIAL BUS CONTROLLER, PQCC28
封裝: PLASTIC, LCC-28
文件頁數(shù): 16/27頁
文件大?。?/td> 181K
代理商: SL811S
SL811S/T
Document #: 38-08009 Rev. **
Page 16 of 27
Notes:
1.
2.
The A0 Address bit is used to access the address register or data registers in I/O Mapped or Memory Mapped applications.
VDD2 can be derived from a +5 VDC supply with a few additional components. The diagram below illustrates a simple method that provides 3.3V/22 mA. Another
option is to use a Torex Semiconductor 3.3V SMD regulator P/N XC62HR3302MR.
X1/X2 Clock requires external 12-/48-MHz matching crystal or clock source.
3.
Pin No.
Pin Type
Pin Name
Pin Description
1
IN
A0
A0 =
0
. Selects Address Pointer. Reg. Write Only.
[1]
A0 =
1
. Selects Data Buffer
or Register. R/W. In Multiplexed address applications; A0 should be tied to VDD1.
2
IN
nDACK
DMA Acknowledge. An active low input used to interface to an external DMA
controller.
3
OUT
nDRQ
DMA Request. An active low output used with an external DMA controller. nDRQ
and nDACK form the handshake for DMA data transfers.
4
IN
NRD
Read Strobe Input. An active low input used with nCS to read registers/data
memory.
5
IN
NWR
Write Strobe Input. An active low input used with nCS to write to registers/data
memory.
6
IN
NCS
Active low SL811S Chip select. Used with nRD and nWD when accessing
SL811S.
7
IN
CM
Clock Mode. Enables DPLL 4x Multiplier for use with 12-MHz Clock.
8
VDD2
3.3 VDC
Power for USB Transceivers. Can be connected to Vdd1.
9
BIDIR
DATA +
USB Differential Data Signal High Side.
10
BIDIR
DATA -
USB Differential Data Signal Low Side.
11
GND
USB GND
Ground Connection for USB.
12
VDD1
3.3 VDC
SL811S Device VDD Power.
13
IN
CLK/X1
12/48 MHz Clock or External Crystal X1 connection.
14
OUT
X2
External Crystal X2 connection.
15
IN
NRST
SL811S Device active low reset input.
16
OUT
INTR
Active high Interrupt Request output to external controller.
17
GND
GND
SL811S Device Ground
18
BIDIR
D0
Data 0. Microprocessor Data/(Address) Bus.
19
BIDIR
D1
Data 1. Microprocessor Data/(Address) Bus.
20
BIDIR
D2
Data 2. Microprocessor Data/(Address) Bus.
21
BIDIR
D3
Data 3. Microprocessor Data/(Address) Bus.
22
GND
GND
SL811S Device Ground.
23
BIDIR
D4
Data 4. Microprocessor Data/(Address) Bus.
24
BIDIR
D5
Data 5. Microprocessor Data/(Address) Bus.
25
BIDIR
D6
Data 6. Microprocessor Data/(Address) Bus.
26
BIDIR
D7
Data 7. Microprocessor Data/(Address) Bus.
27
NC
NC
No Connect.
28
VDD1
3.3 VDC
SL811S Device VDD Power.
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