
15
Revision 1/.ebruary 8, 2001
www.semtech.com
HIGH-PER.ORMANCE PRODUCTS
SK12430
ADVANCED
AC Characteristics
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1.
See application information section for output level versus frequency information.
2.
Output levels will vary 1:1 with V
CCO
variation.
3.
50
to V
CC
- 2.0V termination.
4.
10MHz is the maximum frequencyn to load the feedback divide
registers, S_CLOCK can be switched at higher frequencies when used as a test clock in
TEST_MODE 6.
5.
Maximum frequency on FREF_EXT is a function of the internal M counter limitations. The phase
detector can handle up to 100MHz on the input, but the M counter must reamin in the valid range of
200
≤ M ≤ 400. See the Programming Interface section on page 5 of this data sheet for more details.
6.
See applications Information below for additional information.
7.
50
to V
CC
- 2.0V pull-down.
8.
For Standard ECL DC Specifications, refer to the Logic Family Standard DC Specification Data Sheet.
9.
For part ordering description, see HPP Part Ordering Information Data Sheet.