參數(shù)資料
型號(hào): SI5327D-C-GMR
廠商: SILICON LABORATORIES
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 243 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC36
封裝: 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36
文件頁(yè)數(shù): 14/60頁(yè)
文件大小: 715K
代理商: SI5327D-C-GMR
Si5327
Preliminary Rev. 0.4
21
5. Register Map
All register bits that are not defined in this map should always be written with the specified Reset Values. The
writing to these bits of values other than the specified Reset Values may result in undefined device behavior.
Registers not listed, such as Register 64, should never be written to.
Register
D7
D6
D5
D4
D3
D2
D1
D0
0
FREE_RUN
CKOUT_
ALWAYS_
ON
BYPASS_
REG
2
BWSEL_REG[3:0]
3
DHOLD
SQ_ICAL
4
HIST_DEL[4:0]
5
ICMOS[1:0]
6
SFOUT2_REG[2:0]
SFOUT1_REG[2:0]
8
HLOG_2[1:0]
HLOG_1[1:0]
9
HIST_AVG[4:0]
10
DSBL2_
REG
DSBL1_
REG
11
PD_CK2
PD_CK1
19
VALTIME[1:0]
LOCK[T2:0]
20
CK2_
BAD_
PIN
CK1_
BAD_
PIN
LOL_PIN
INT_PIN
22
CK_BAD_
POL
LOL_POL
INT_POL
23
LOS2_MSK
LOS1_MSK
LOSX_MSK
24
LOL_MSK
25
N1_HS[2:0]
31
NC1_LS[19:16]
32
NC1_LS[15:8]
33
NC1_LS[7:0]
34
NC2_LS[19:16]
35
NC2_LS[15:8]
36
NC2_LS[7:0]
40
N2_HS[2:0]
N2_LS[19:16]
41
N2_LS[15:8]
42
N2_LS[7:0]
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