參數(shù)資料
型號(hào): SI5327D-C-GMR
廠商: SILICON LABORATORIES
元件分類: 時(shí)鐘產(chǎn)生/分配
英文描述: 243 MHz, PROC SPECIFIC CLOCK GENERATOR, QCC36
封裝: 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD, QFN-36
文件頁(yè)數(shù): 10/60頁(yè)
文件大小: 715K
代理商: SI5327D-C-GMR
Si5327
18
Preliminary Rev. 0.4
3. Typical Application Circuit
Figure 5. Si5327 Typical Application Circuit (I2C Control Mode)
Note:
For an example schematic and layout, refer to the Si5327-EVB User’s Guide.
Figure 6. Si5327 Typical Application Circuit (SPI Control Mode)
Note:
For an example schematic and layout, refer to the Si5327-EVB User’s Guide.
GND
P
A
D
Si5327
INT_LOS1
LOS2
LOL
RST
CKOUT1+
CKOUT1–
VD
D
GN
D
Ferrite
Bead
System
Power
Supply
C1
C2
C3
Serial Data
Serial Clock
Reset
Interrupt/CKIN1 LOS Indicator
CKIN2 LOS Indicator
PLL Loss of Lock Indicator
Clock Outputs
CKOUT2+
CKOUT2–
SDA
SCL
I2C Interface
Serial Port Address
A[2:0]
CMODE
Control Mode (L)
100
0.1 F
+
100
0.1 F
+
C4
0.1 F
1 F
Clock Select
CKSEL
1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
3. I2C-required pull-up resistors not shown.
Notes:
XA
XB
Refclk+
Option 2:
0.1 F
Refclk–
0.1 F
RATE2
Crystal/Ref Clk Rate
VDD
15 k
15 k
XA
XB
Crystal
Option 1:
Input
Clock
Sources*
CKIN2+
CKIN2–
130
130
82
82
VDD = 3.3 V
130
130
82
82
VDD = 3.3 V
CKIN1+
CKIN1–
GND
P
A
D
Si5327
RST
CKOUT1+
CKOUT1–
VD
D
GN
D
Ferrite
Bead
System
Power
Supply
C1
C2
C3
Reset
Clock Outputs
CKOUT2+
CKOUT2–
CMODE
Control Mode (H)
CKIN2+
CKIN2–
100
0.1 F
+
100
0.1 F
+
C4
0.1 F
1 F
CKIN1+
CKIN1–
INT_LOS1
LOS2
SPI Interface
LOL
Interrupt/CLKIN1 LOS Indicator
CLKIN2 LOS Indicator
PLL Loss of Lock Indicator
Serial Data Out
Serial Data In
SDO
SDI
Serial Clock
SCLK
Slave Select
SS
Clock Select
CKSEL
G
ND
P
A
D
1. Assumes differential LVPECL termination (3.3 V) on clock inputs.
2. Denotes tri-level input pins with states designated as L (ground), M (VDD/2), and H (VDD).
Notes:
Input
Clock
Sources*
130
130
82
82
VDD = 3.3 V
130
130
82
82
VDD = 3.3 V
XA
XB
Refclk+
Option 2:
0.1 F
Refclk–
0.1 F
RATE2
Crystal/Ref Clk Rate
VDD
15 k
15 k
XA
XB
Crystal
Option 1:
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