參數(shù)資料
型號： SDA9257
廠商： SIEMENS A G
元件分類： 消費家電
英文描述： Clock Sync Generator
中文描述： SPECIALTY CONSUMER CIRCUIT, PDIP28
文件頁數(shù)： 10/36頁
文件大?。?/td> 1304K
代理商： SDA9257
SDA 9257
Semiconductor Group
191
Note:
The pull-in range of the VCO is
±
8 %, irrespective of the center frequency
External Clock Frequency Setting (subaddresses 03 and 04)
Note:
When clock frequencies below 24 MHz or above 29 MHz are selected, the VCO should be
set with control bits VCO2 … VCO0 as well. Clock jitter may rise when crystal clock FQ is
changed.
Center Frequency
(of VCO)
Control Bits
VCO2
VCO1
VCO0
Approx. 22.4 MHz
0
1
1
Approx. 24.0 MHz
0
1
0
Approx. 25.6 MHz
0
0
1
Approx. 27.0 MHz
0
0
0
Approx. 29.0 MHz
1
1
1
Approx. 31.0 MHz
1
1
0
Approx. 33.0 MHz
1
0
1
Approx. 35.0 MHz
1
0
0
Clock Frequency on CLK1 (FQ = XTAL Frequency,
[INC] = Digital Value of INC15 … INC00)
EXINC bit must be set)
Control Bits
(MSB)
(binary offset)
(LSB)
INC15
INC14
…
INC00
F = FQ
×
4
65536/262144 = FQ
F = FQ
×
4
(65536 + [INC])/262144
F = FQ
×
4
(65536 + 65535)/262144 = 2 x FQ
0
1
0
1
…
…
0
1
.
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