參數(shù)資料
型號(hào): SCANPSC100FDMQB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 微控制器/微處理器
英文描述: SPECIALTY MICROPROCESSOR CIRCUIT, CDIP28
封裝: CERAMIC, DIP-28
文件頁(yè)數(shù): 6/27頁(yè)
文件大小: 381K
代理商: SCANPSC100FDMQB
Serial Scan Interface (SSI) (Continued)
The PRPG is loaded by four PPI writes to the TDO address.
When the PRPG enable bit is set, a pulse is issued internally
that initializes the local parallel load logic such that the
PRPG is loaded sequentially, least significant byte first, most
significant byte last. When in PRPG mode, writes can be
completed at any time; however, shift operations will be
disabled until the PRPG is fully loaded.
LOOP AROUND MODE . This mode, enabled by setting bit
0 in Mode Register 0, will cause data appearing at the TDI
input to be placed directly back on the TDO output. This
10032511
FIGURE 11. TDO Shifter/Buffer Block Diagram Register Hookup
10032514
FIGURE 12. TDO PRPG Block Diagram
SCANPSC100F
Embedded
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相關(guān)PDF資料
PDF描述
SCANPSC100FLMQB SPECIALTY MICROPROCESSOR CIRCUIT, CQCC28
SCB68172C2F28 VME BUS CONTROLLER, CDIP28
SCC2691AC1D24 1 CHANNEL(S), 38.4K bps, SERIAL COMM CONTROLLER, PDSO24
SCC2691AE1A28 1 CHANNEL(S), 38.4K bps, SERIAL COMM CONTROLLER, PQCC28
SCC2692AC1A44-T 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC44
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