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Chapter 13 FlexRay Communication Controller (FLEXRAY)
MC9S12XF - Family Reference Manual, Rev.1.19
580
Freescale Semiconductor
The streaming commit mode is congured by clearing the message buffer commit mode bit MCM in the
In this mode, the internal message transfer from the commit side to the transmit side is started for a double
transmit message buffer when all of the following conditions are fullled
1. the commit side is in the Idle state
2. the commit site message data are valid, i.e. MBCCSR[2n].CMT = 1
3. the transmit side is in one of the states Idle, CCSa, or CCMa
4. the transmit side contains either no valid message data, i.e. MBCCSR[2n+1].CMT = 0 or
the message data were transmitted at least once, i.e. MBCCSR[2n+1].DVAL = 1
An example of a streaming commit mode state change diagram is given in
Figure 13-128. In this example,
both the commit and the transmit side do not contain valid message data and the application provides two
messages. The message buffer does not match the next slot.
Figure 13-128. Internal Message Transfer in Streaming Commit Mode
Immediate Commit Mode
The intention of the immediate commit mode is to transmit the latest data provided by the application. This
implies that it is not guaranteed that each provided message will be transmitted at least once.
The immediate commit mode is congured by setting the message buffer commit mode bit MCM in the
In this mode, the internal message transfer from the commit side to the transmit side is started for one
double transmit message buffer when all of the following conditions are fullled
1. the commit side is in the Idle state
2. the commit site message data are valid, i.e. MBCCSR[2n].CMT = 1
3. the transmit side is in one of the states Idle, CCSa, or CCMa
It is not checked whether the transmit side contains no valid message data or valid message data were
transmitted at least once. If message data are valid and not transmitted, they may be overwritten.
An example of a streaming commit mode state change diagram is given in
Figure 13-129. In this example,
both the commit and the transmit side do not contain valid message data, and the application provides two
messages and the rst message is gets overwritten. The message buffer does not match the next slot.
Idle
C
omm
it
T
ransm
it
Idle
HL
HLck
Side
slot s
slot s+1
slot s+2
search[s+1]
slot
start
slot
start
slot
start
HU
CCITx
Idle
IS
CCITx
IE
Idle
HL
HLck
HU
Idle
no internal message transfer,
until message transmitted