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Chapter 13 FlexRay Communication Controller (FLEXRAY)
MC9S12XF - Family Reference Manual, Rev.1.19
572
Freescale Semiconductor
NOTE
If the number of the last slot in the current communication cycle on a given
channel is n, then all receive message buffers assigned to this channel with
MBFIDRn.FID > n will not be updated at all.
When the receive message buffer update has nished the status updated transition SU is triggered, which
changes the buffer state from CCSu to Idle. An example receive message buffer timing and state change
Figure 13-123. Message Reception Timing
The amount of message data written into the message buffer data eld of the receive shadow buffer is
determined by the following two items:
1. the message buffer segment that the message buffer is assigned to, as dened by the
Message3. the number of bytes received over the FlexRay bus
If the message buffer is assigned to the message buffer segment 1, and the number of received bytes is
greater than 2*MBDSR.MBSEG1DS, the FlexRay block writes only 2*MBDSR.MBSEG1DS bytes into
the message buffer data eld of the receive shadow buffer. If the number of received bytes is less than
2*MBDSR.MBSEG1DS, the FlexRay block writes only the received number of bytes and will not change
the trailing bytes in the message buffer data eld of the receive shadow buffer. The same holds for the
message buffer segment 2 with MBDSR.MBSEG2DS.
13.6.6.3.4
Received Message Access
To access the message data received over the FlexRay bus, the application reads the message data stored
in the message buffer data eld of the corresponding receive message buffer. The access to the message
The application can read the message buffer data eld if the receive message buffer is one of the states
HDis, HDisLck, or HLck. If the message buffer is in one of these states, the FlexRay block will not change
the content of the message buffer.
13.6.6.3.5
Receive Shadow Buffers Concept
The receive shadow buffer concept applies only to individual receive message buffers. The intention of this
concept is to ensure that only syntactically and semantically valid received non-null frames are presented
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MT
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BS
slot s
SLS
SU
CCBs
CCRx
slot s+1
Idle
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Idle
slot s+2
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MT
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message receive to receive shadow buffer
SSS
CCSu
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