參數(shù)資料
型號: SC18IS600IBS,151
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: I2C BUS CONTROLLER, PQCC24
封裝: 4 X 4 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT616-3, HVQFN-24
文件頁數(shù): 7/30頁
文件大?。?/td> 164K
代理商: SC18IS600IBS,151
SC18IS600_601_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 28 July 2008
15 of 30
NXP Semiconductors
SC18IS600/601
SPI to I2C-bus interface
When the host issues a Read Buffer command, the SC18IS600/601 will return the data in
the Read Buffer on the MISO pin. Note that the Read Buffer will be overwritten if an
additional ‘Read N bytes’ or a ‘Read after write’ command is executed before the Read
Buffer command.
6.6.5 I2C-bus write after write
When the host issues this command, the SC18IS600/601 will rst write N data bytes to
the I2C-bus slave 1 device followed by a write of M data bytes to the I2C-bus slave 2
device.
6.6.6 SPI conguration
The SPI conguration command can be used to change the order in which the bits of SPI
data byte are sent on the SPI bus. In the LSB rst conguration (SPI conguration data is
0x81), bit 0 is the rst bit sent of any SPI byte. In MSB rst (SPI conguration data is
0x42), bit 7 is the rst bit sent. Table 9 shows the two possible congurations that can be
programmed.
Fig 17. Write after write
002aab721
NUMBER OF
BYTES 1
0x03
COMMAND
SLAVE 1
ADDRESS + W
SPI host sends
DATA
BYTE 1
DATA
BYTE N
NUMBER OF
BYTES 2
SLAVE 2
ADDRESS + W
DATA
BYTE 1
DATA
BYTE N
Fig 18. SPI conguration
Table 9.
SPI conguration
Data order
0x81
LSB rst
0x42
MSB rst (default)
002aab722
0x18
COMMAND
SPI
CONFIGURATION
SPI host sends
CS
SCLK
MOSI
SPI configuration data
character 0x18
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