參數(shù)資料
型號: SC18IS600IBS,151
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: I2C BUS CONTROLLER, PQCC24
封裝: 4 X 4 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT616-3, HVQFN-24
文件頁數(shù): 1/30頁
文件大?。?/td> 164K
代理商: SC18IS600IBS,151
1.
General description
The SC18IS600/601 is designed to serve as an interface between the standard SPI of a
host (microcontroller, microprocessor, chip set, etc.) and the serial I2C-bus. This allows
the host to communicate directly with other I2C-bus devices. The SC18IS600/601 can
operate as an I2C-bus master-transmitter or master-receiver. The SC18IS600/601
controls all the I2C-bus specic sequences, protocol, arbitration and timing.
The key distinction between the SC18IS600 and the SC18IS601 lies in the clock source:
internal (SC18IS600) versus external (SC18IS601).
2.
Features
I SPI slave interface
I SPI Mode 3
I Master I2C-bus controller
I General Purpose Input/Output (GPIO) pins: 4 (SC18IS600); 3 (SC18IS601)
I Two quasi-bidirectional I/O pins
I 5 V tolerant I/O pins
I High-speed SPI:
N Up to 3 Mbit/s (SC18IS601)
N Up to 1.2 Mbit/s (SC18IS600)
I High-speed I2C-bus: 400 kbit/s
I 96-byte transmit buffer
I 96-byte receive buffer
I 2.4 V to 3.6 V operation
I Power-down mode with WAKEUP pin
I Oscillator: internal (SC18IS600); external (SC18IS601)
I Active LOW interrupt output
I Available in very small TSSOP16 and HVQFN24 packages
SC18IS600/601
SPI to I2C-bus interface
Rev. 05 — 28 July 2008
Product data sheet
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