參數(shù)資料
型號: SC18IS600IBS,151
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: I2C BUS CONTROLLER, PQCC24
封裝: 4 X 4 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT616-3, HVQFN-24
文件頁數(shù): 26/30頁
文件大?。?/td> 164K
代理商: SC18IS600IBS,151
SC18IS600_601_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 28 July 2008
5 of 30
NXP Semiconductors
SC18IS600/601
SPI to I2C-bus interface
5.2 Pin description
[1]
HVQFN24 package die supply ground is connected to both VSS pin and exposed center pad. VSS pin must be connected to supply
ground for proper device operation. For enhanced thermal, electrical, and board level performance, the exposed pad needs to be
soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias
need to be incorporated in the PCB in the thermal pad region.
Table 2.
Pin description
Symbol
Pin
Type
Description
TSSOP16
HVQFN24
SC18IS600
SC18IS601
SC18IS600
GPIO0
1
23
I/O
programmable I/O pin
CS
2
1
I
Chip select. When CS is LOW, the SC18IS600/601 is
selected.
RESET
3
2
I
Master Reset. When active (LOW), RESET sets internal
registers to the default values, and resets the I2C-bus and
SPI hardware. See Table 3.
VSS
44
I
ground supply voltage
MISO
5
4
O
SPI slave data output
MOSI
6
5
I
SPI slave data input
SDA
7
6
I/O
I2C-bus serial data input/output
SCL
88
8O
I2C-bus serial clock output
GPIO1
9
11
I/O
programmable I/O pin
GPIO2
10
13
I/O
programmable I/O pin
SCLK
11
14
I
SPI clock input
VDD
12
15
I
2.4 V to 3.6 V supply voltage
GPIO3
13
-
16
I/O
programmable I/O pin
CLKIN
-
13
-
I
external clock input
INT
14
17
O
Interrupt. When active (LOW), INT informs the CPU that
the SC18IS600/601 has an interrupt to be serviced.
INT is reset (deactivated) either when the I2CStat register
is read or as a result of a master reset (RESET). This pin
is an open-drain pin.
WAKEUP/IO4 15
15
18
I/O
Wake up the SC18IS600/601 from the Power-down mode.
Pulled LOW by the host to wake-up from low power state.
This pin can also be used as a quasi-bidirectional I/O
when not in a power-down state.
IO5
16
20
I/O
quasi-bidirectional I/O pin
n.c.
-
7, 9, 10, 12,
19, 21, 22,
24
-
not connected
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