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參數(shù)資料
| 型號： | SB83C196NP |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, MROM, 25 MHz, MICROCONTROLLER, PQFP100 |
| 封裝： | SQFP-100 |
| 文件頁數(shù)： | 8/33頁 |
| 文件大?。?/td> | 1159K |
| 代理商： | SB83C196NP |
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16
8XC251SA/SB/SP/SQ HIGH-PERFORMANCE CHMOS MICROCONTROLLER
V
CC
PWR
Digital Supply Voltage
Connect each V
CC pin to the digital supply voltage.
—
V
SS
GND
Digital Circuit Ground
Connect each V
SS pin to ground through the lowest possible imped-
ance path.
—
WR#
O
Write
This active-low output indicates that an external write is occurring.
This signal is asserted only during external memory writes.
The chip configuration register 0 (CCR0) determines whether this
pin functions as WR# or WRL#. CCR0.2=1 selects WR#; CCR0.2=0
selects WRL#.
WRL#
WRH#
O
Write High
During 16-bit bus cycles, this active-low output signal is asserted for
high-byte writes and word writes to external memory. During 8-bit
bus cycles, WRH# is asserted for all write operations.
The chip configuration register 0 (CCR0) determines whether this
pin functions as BHE# or WRH#. CCR0.2=1 selects BHE#;
CCR0.2=0 selects WRH#.
BHE#
WRL#
O
Write Low
During 16-bit bus cycles, this active-low output signal is asserted for
low-byte writes and word writes. During 8-bit bus cycles, WRL# is
asserted for all write operations.
The chip configuration register 0 (CCR0) determines whether this
pin functions as WR# or WRL#. CCR0.2=1 selects WR#; CCR0.2=0
selects WRL#.
WR#
XTAL1
I
Input Crystal/Resonator or External Clock Input
Input to the on-chip oscillator and the internal clock generators. The
internal clock generators provide the peripheral clocks, CPU clock,
and CLKOUT signal. When using an external clock source instead
of the on-chip oscillator, connect the clock input to XTAL1. The
external clock signal must meet the V
IH specification for XTAL1.
—
XTAL2
O
Inverted Output for the Crystal/Resonator
Output of the on-chip oscillator inverter. Leave XTAL2 floating when
the design uses an external clock source instead of the on-chip
oscillator.
—
Table 8. Pin Descriptions (Continued)
Name
Type
Description
Multiplexed
with
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