參數(shù)資料
型號(hào)： SATMEGA32A-ANR
廠商： ATMEL CORP
元件分類(lèi)： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 16 MHz, RISC MICROCONTROLLER, PQFP44
封裝： 10 X 10 MM, 1 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, MS-026ACB, TQFP-44
文件頁(yè)數(shù)： 204/353頁(yè)
文件大?。?/td> 5149K
代理商： SATMEGA32A-ANR
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282
8155C–AVR–02/11
ATmega32A
1.
Power-up sequence:
Apply power between V
CC and GND while RESET and SCK are set to “0”. In some sys-
tems, the programmer can not guarantee that SCK is held low during power-up. In this
case, RESET must be given a positive pulse of at least two CPU clock cycles duration
after SCK has been set to “0”.
2.
Wait for at least 20ms and enable SPI Serial Programming by sending the Program-
ming Enable serial instruction to pin MOSI.
3.
The SPI Serial Programming instructions will not work if the communication is out of
synchronization. When in sync. the second byte ($53), will echo back when issuing the
third byte of the Programming Enable instruction. Whether the echo is correct or not, all
four bytes of the instruction must be transmitted. If the $53 did not echo back, give
RESET a positive pulse and issue a new Programming Enable command.
4.
The Flash is programmed one page at a time (page size found in “Page Size” on page
269). The memory page is loaded one byte at a time by supplying the 6 LSB of the
address and data together with the Load Program Memory Page instruction. To ensure
correct loading of the page, the data low byte must be loaded before data high byte is
applied for a given address. The Program Memory Page is stored by loading the Write
Program Memory Page instruction with the 8 MSB of the address. If polling is not used,
the user must wait at least t
WD_FLASH before issuing the next page. (See Table 26-13).
Accessing the SPI Serial Programming interface before the Flash write operation com-
pletes can result in incorrect programming.
5.
The EEPROM array is programmed one byte at a time by supplying the address and
data together with the appropriate Write instruction. An EEPROM memory location is
first automatically erased before new data is written. If polling is not used, the user must
wait at least t
WD_EEPROM before issuing the next byte. (See Table 26-13). In a chip
erased device, no $FFs in the data file(s) need to be programmed.
6.
Any memory location can be verified by using the Read instruction which returns the
content at the selected address at serial output MISO.
7.
At the end of the programming session, RESET can be set high to commence normal
operation.
8.
Power-off sequence (if needed):
Set RESET to “1”.
Turn V
CC power off.
26.9.2
Data Polling Flash
When a page is being programmed into the Flash, reading an address location within the page
being programmed will give the value $FF. At the time the device is ready for a new page, the
programmed value will read correctly. This is used to determine when the next page can be writ-
ten. Note that the entire page is written simultaneously and any address within the page can be
used for polling. Data polling of the Flash will not work for the value $FF, so when programming
this value, the user will have to wait for at least t
WD_FLASH before programming the next page. As
a chip erased device contains $FF in all locations, programming of addresses that are meant to
contain $FF, can be skipped. See Table 26-13 for t
WD_FLASH value
26.9.3
Data Polling EEPROM
When a new byte has been written and is being programmed into EEPROM, reading the
address location being programmed will give the value $FF. At the time the device is ready for a
new byte, the programmed value will read correctly. This is used to determine when the next
byte can be written. This will not work for the value $FF, but the user should have the following in
mind: As a chip erased device contains $FF in all locations, programming of addresses that are
meant to contain $FF, can be skipped. This does not apply if the EEPROM is re-programmed
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