參數(shù)資料
型號: SAA7378GP
廠商: NXP Semiconductors N.V.
英文描述: Single Chip Digital Servo Processor and Compact Disc Decoder
中文描述: 單片機數(shù)字伺服處理器和光盤解碼器
文件頁數(shù): 38/45頁
文件大?。?/td> 224K
代理商: SAA7378GP
Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
38
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
Notes:
1)
Highest clock frequency at which data slicer produces 1010 output in analogue self-test mode.
2)
V
RL
= 0V,f
sys
=4.2336MHz. The maximum input current depends on the value of the external resistor connected
to IREFT.
I
max
= 2.4 / R
IREFT
2.4 / 220k = 10.9
μ
A.
For R1 and R2:
I
max
= 1.2 / R
IREFT
1.2 / 220k = 5.45
μ
A.
For D1 to D4:
3)
Internal reference source with 32 different output voltages. Selection is achieved during a calibration period
or via the serial interface. The values given are for an unloaded V
RH
.
4)
f
ripple
= 1 kHz, V
ripple
= 0.5 V
p-p
.
5)
V
RH
= 2.5 V and V
RL
= 0 V, measuring bandwidth: 200 Hz - 20 kHz, f
in(ADC)
= 1 kHz.
6)
Gain of the ADC is defined as :
G(ADC) = f
sys
/I
max
(counts/
μ
A)
Thus digital output = I
I
x G(ADC) where:
Digital output = the number of pulses at the digital output in counts/s and I
I
= the DC input current in
μ
A.
The maximum input current depends on the system frequency (f
sys
=4.2336MHz) and on V
RH
- V
RL
.
The gain tolerance is the deviation from the calculated gain regarding Note 2.
7)
It is recommended that the series resistance of the crystal or ceramic resonator is
60
.
SYMBOL
Digital Input/Output
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNIT
Input/Output: SDA CMOS input/open drain output (with protection diode to VDD)
input voltage LOW
input voltage HIGH
tri-state leakage current
V
IN
= 0 - V
DD
input capacitance
output voltage LOW
I
OL
= +2 mA
output current
load capacitance
output fall time (C
L
= 20 pF)
(V
DD
- 0.8) - 0.8
Crystal Oscillator
Input: CRIN
(external clock)
V
IL
input voltage LOW
V
IH
input voltage HIGH
I
IN
input leakage current
C
IN
input capacitance
Output: CROUT
see Figure 3
fc
crystal frequency
see Note 7
g
m
mutual conductance at 100kHz
A
V
small signal voltage gain
A
V
= g
m
* R
O
C
F
feedback capacitance
C
OUT
output capacitance
V
IL
V
IH
I
IN
C
IN
V
OL
I
OL
C
L
t
F
-0.3
0.7 x V
DD
-10
-
0
-
-
-
-
-
-
-
-
-
-
-
0.3 x V
DD
V
DD
+ 0.3
+10
10
0.4
4
50
15
V
V
μ
A
pF
V
mA
pF
ns
-0.3
0.7 x V
DD
-10
-
-
-
-
-
0.3 x V
DD
V
DD
+ 0.3
+10
10
V
V
μ
A
pF
8
-
-
-
-
8.4672
10
18
-
-
35
-
-
5
10
MHz
mA/V
V/V
pF
pF
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