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參數(shù)資料
| 型號： | SAA7378GP |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single Chip Digital Servo Processor and Compact Disc Decoder |
| 中文描述： | 單片機數(shù)字伺服處理器和光盤解碼器 |
| 文件頁數(shù)： | 26/45頁 |
| 文件大?。?/td> | 224K |
| 代理商： | SAA7378GP |
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Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
26
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
9.
Communication on the microprocessor interface is via a 4-wire bus: the protocol being compatible with SAA7345 (CD6) and
TDA1301 (DSIC2):
SCL - serial bit clock.
SDA - serial data.
RAB - R/W control and data strobe (active high) for writing to registers 0 - F, reading status bit selected via
register 2 and reading Q channel subcode.
SILD- R/W control and data strobe (active low) for servo commands.
MICROPROCESSOR INTERFACE
9.1
The sixteen 4-bit programmable configuration registers, 0 to E (Table 1), can be written to via the microprocessor interface
using the protocol shown in Figure 19.
Writing Data to Registers 0 - E
Note that: - SILD must be held high.
- A(3:0) identifies the register number, D(3:0) is the data.
- the data is latched into the register on the low-high transition of RAB.
9.1.1
The same data can be repeated several times (eg: for a fade function) by applying extra RAB pulses as shown in Figure 20.
Note that SCL must stay high between RAB pulses.
Writing Repeated Data to Registers 0 - E
9.2
There are several internal status signals, selected via register 2, which can be made available on the SDA line. These are:
-
SUBQREADY-I
Low if new subcode word is ready in Q-channel register.
-
MOTSTART1
High if motor is turning at 75% or more of nominal speed.
-
MOTSTART2
High if motor is turning at 50% or more of nominal speed.
-
MOTSTOP
High if motor is turning at 12% or less of nominal speed. Can be set to indicate 6% or less
(instead of 12% or less) via register E.
-
PLL Lock
High if Sync coincidencesignals are found.
-
V1
Follows input on V1 pin.
Reading Decoder Status Information on SDA
RAB (
μ
P)
SCL (
μ
P)
SDA (
μ
P)
SDA (SAA7378)
Hi-impedance
A3
A2
A1
A0
D3
D2
D1
D0
Figure 19 Microprocessor Write Protocol for Registers 0 to E
RAB (
μ
P)
SCL (
μ
P)
SDA (
μ
P)
SDA (decoder)
Hi-impedance
A3
A2
A1
A0
D3
D2
D1
D0
Figure 20 Microprocessor Write Protocol for Registers 0 to E - Repeat Mode
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相關(guān)代理商/技術(shù)參數(shù) |
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| SAA7380 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7380GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7381 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ATAPI CD-R block decoder |
| SAA7382 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7382GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
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