- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372115 > SAA7378GP (NXP Semiconductors N.V.) Single Chip Digital Servo Processor and Compact Disc Decoder PDF資料下載
參數(shù)資料
| 型號(hào)： | SAA7378GP |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single Chip Digital Servo Processor and Compact Disc Decoder |
| 中文描述： | 單片機(jī)數(shù)字伺服處理器和光盤解碼器 |
| 文件頁數(shù)： | 20/45頁 |
| 文件大?。?/td> | 224K |
| 代理商： | SAA7378GP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁當(dāng)前第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
20
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
Play mode
Stop mode 1 Disc is braked by applying a negative voltage to the motor. No decisions are involved.
Stop mode 2 The Disc is braked as in Stop mode 1 but the PLL will monitor the Disc speed. As soon as the Disc
reaches 12% (or 6%, depending on the programmed brake percentage, via register E) of its nominal
speed, the MOTSTOP status signal will go high and switch the motor servo to Off mode
Off mode
Motor not steered.
In the SAA7378 decoder there is an anti-wind-up mode for the motor servo, selected via register 1. When the anti-wind-up
mode is activated the motor servo integrator will hold if the motor output saturates.
FIFO released after resetting to 50%. Audio mute released.
7.12.2.1
In Start mode 1, Start mode 2, Stop mode 1 and Stop mode 2 a fixed positive or negative voltage is applied to the motor.
This voltage can be programmed as a percentage of the maximum possible voltage, via register 6, to limit current drain
during start and stop. The following power limits are possible:
100% (no power limit), 75%, 50%, or 37% of maximum.
Power Limit
7.12.3
The gain and crossover frequencies of the motor control loop can be programmed via registers 4 and 5. The following
parameter values are possible:
Gains: 3.2, 4.0, 6.4, 8.0, 12.8, 16, 25.6, 32
Crossover frequency f
4
: 0.5Hz, 0.7Hz, 1.4Hz, 2.8Hz
Crossover frequency f
3
: 0.85Hz, 1.71Hz, 3.42Hz
Loop Characteristics
7.12.4
If FIFO overflow occurs during Play mode(eg: as a result of motor rotational shock), the FIFO will be automatically reset to
50% and the audio interpolator tries to conceal as much as possible to minimise the effect of data loss.
FIFO Overflow
A
f
B
W
f
4
f
3
Figure 15 Motor Servo Bode Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7380 | Error correction and host interface IC for CD-ROM ELM |
| SAA7380GP | Error correction and host interface IC for CD-ROM ELM |
| SAA7381 | ATAPI CD-R block decoder |
| SAA7382GP | Error correction and host interface IC for CD-ROM ELM |
| SAA7382 | Error correction and host interface IC for CD-ROM ELM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7380 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7380GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7381 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ATAPI CD-R block decoder |
| SAA7382 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7382GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。