- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄372115 > SAA7378GP (NXP Semiconductors N.V.) Single Chip Digital Servo Processor and Compact Disc Decoder PDF資料下載
參數(shù)資料
| 型號： | SAA7378GP |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Single Chip Digital Servo Processor and Compact Disc Decoder |
| 中文描述： | 單片機數(shù)字伺服處理器和光盤解碼器 |
| 文件頁數(shù)： | 28/45頁 |
| 文件大?。?/td> | 224K |
| 代理商： | SAA7378GP |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁當前第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁
Philips Semiconductors
Preliminary specification: Version 1.0
May 1995
28
Digital Servo Processor and Compact Disc Decoder (CD7)
SAA7378GP
When the CRC is good and subcode is being read, the timing in Figure 24 applies
:
If t
1
(SUBQREADY-Istatus low to end of subcode read) is below 2.6ms, then t
2
= 13.1ms [ie: the microprocessor can read
all subcode frames if it completes the read operation within 2.6ms after the subcode is ready]. If this criterion is not met, it is
only possible to guarantee that t
3
will be below 26.2ms (approximately).
If subcode frames with failed CRCs are present, the t
2
and t
3
times will be increased by 13.1ms for each defective subcode
frame.
9.4
A write data command is used to transfer data (a number of bytes) from the microprocessor, using the protocol shown in
Figure 25. The first of these bytes is the command byte and the following are data bytes; the number (between 1 and 7)
depends on the command byte.
Write Servo Commands
Note that: - RAB must be held low.
- The command or data is interpreted by the SAA7378 after the high-low transition of SILD.
- There must be a minimum time of 65
μ
s between SILD pulses.
9.4.1
The same data byte can be can be repeated by applying extra SILD pulses as shown in Figure 26. SCL must stay high
Writing Repeated Data In Servo Commands
RAB (
μ
P)
SCL (
μ
P)
SDA (SAA7378)
Read start allowed
10.8ms
15.4ms
2.3
ms
CRC OK
CRC OK
High
impedance
Figure 23
SUBQREADY-I Status Timing when no Subcode is Read
RAB (
μ
P)
SCL (
μ
P)
SDA (SAA7378)
Q1
Q2
Q3
Qn
t
2
t
1
t
3
Figure 24
SUBQREADY-IStatus Timing when Subcode is Read
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SAA7380 | Error correction and host interface IC for CD-ROM ELM |
| SAA7380GP | Error correction and host interface IC for CD-ROM ELM |
| SAA7381 | ATAPI CD-R block decoder |
| SAA7382GP | Error correction and host interface IC for CD-ROM ELM |
| SAA7382 | Error correction and host interface IC for CD-ROM ELM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAA7380 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7380GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7381 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ATAPI CD-R block decoder |
| SAA7382 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7382GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
發(fā)布緊急采購，3分鐘左右您將得到回復。