參數(shù)資料
型號(hào)： SAA7110
廠商： NXP SEMICONDUCTORS
元件分類： 顏色信號(hào)轉(zhuǎn)換
英文描述： Digital Multistandard Colour Decoder(數(shù)字多標(biāo)準(zhǔn)彩色譯碼器)
中文描述： COLOR SIGNAL DECODER, PQCC68
封裝： PLASTIC, MO-047AC, SOT-188-2, LCC-68
文件頁數(shù)： 29/76頁
文件大?。?/td> 416K
代理商： SAA7110
1995 Oct 18
29
Philips Semiconductors
Product specification
One Chip Front-end 1 (OCF1)
SAA7110; SAA7110A
15.2
Power-on control
Power-on reset is activated at power-on (using only internal CGC) and if the supply voltage falls below 3.5 V. The RESET
signal can be applied to reset other circuits of the digital TV system.
Table 5
Power-on control sequence
INTERNAL POWER-ON
CONTROL SEQUENCE
PIN OUTPUT STATUS
FUNCTION
Directly after power-on
asynchronous reset
Y7 to Y0, UV7 to UV0, RTCO, PLIN, ODD,
GPSW, SDA, HREF, HS, VS, HCL and HSY
in high impedance state
LLC, LLC2 and CREF in HIGH state
LLC, LLC2 and CREF active
direct switching to high impedance (outputs)
or input mode (I/Os) for 20 to 200 ms
Start synchronous
I
2
C-bus reset sequence
Status after I
2
C-bus reset Y7 to Y0, UV7 to UV0, HREF and HS held
in high impedance state
starting I
2
C-bus reset sequence
VS, HCL and HSY held in input function
mode
SA0DH = 7DH
(VTRC = 0, RTSE = 1,
HRMV = 1, SSTB = 0, SECS = 1)
SA0EH = 00H
(HPLL = 0, OEHV = 0,
OEYC = 0, CHRS = 0, GPSW = 0)
SA31H = 00H
(AOSL 1 : 0 = 00, WIRS = 0,
WRSE = 0, SQPB = 0, VBLKA = 0,
PULIO = 0)
after power-on (reset sequence) a complete
I
2
C-bus transmission is required
Status after power-on
control sequence
RTCO, PLIN, ODD, GPSW and SDA active
Fig.19 Power-on control circuit.
handbook, full pagewidth
POC VDD
ANALOG
POC
LOGIC
POC VDD
DIGITAL
MGC838
DELAY
CONTROL
CLOCK I/O
CONTROL
CLOCK
OUTPUT
ACTIVE
CONTROL
CGCE
LLC
RESET
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAA7110/7110A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:One Chip Frontend 1 (OCF1) Product Specification
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SAA7110AWP/00 制造商:NXP Semiconductors 功能描述:
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SAA7111A 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Enhanced Video Input Processor EVIP
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