參數(shù)資料
型號: S29GL256N10FAI010
廠商: SPANSION LLC
元件分類: PROM
英文描述: MirrorBit Flash Family
中文描述: 16M X 16 FLASH 3V PROM, 100 ns, PBGA64
封裝: 13 X 11 MM, FBGA-64
文件頁數(shù): 80/95頁
文件大?。?/td> 3781K
代理商: S29GL256N10FAI010
May 30, 2008 S29GL-N_00_B8
S29GL-N
81
Data
She e t
16. Erase And Programming Performance
Notes
1. Typical program and erase times assume the following conditions: 25°C, 3.0 V VCC, 10,000 cycles, checkerboard pattern.
2. Under worst case conditions of 90°C, VCC = 3.0 V, 100,000 cycles.
3. Effective write buffer specification is based upon a 16-word write buffer operation.
4. In the pre-programming step of the Embedded Erase algorithm, all bits are programmed to 00h before erasure.
5. System-level overhead is the time required to execute the two- or four-bus-cycle sequence for the program command. See Table 9.1
on page 60 and Table 9.3 on page 62 for further information on command definitions.
17. TSOP Pin and BGA Package Capacitance
Notes
1. Sampled, not 100% tested.
2. Test conditions TA = 25°C, f = 1.0 MHz.
Parameter
Typ
Max
Unit
Comments
Sector Erase Time
0.5
3.5
sec
Excludes 00h programming
prior to erasure (Note 4)
Chip Erase Time
S29GL128N
64
256
sec
S29GL256N
128
512
S29GL512N
256
1024
Total Write Buffer Programming Time (Note 3)
240
s
Excludes system level
overhead (Note 5)
Total Accelerated Effective Write Buffer Programming
200
s
Chip Program Time
S29GL128N
123
sec
S29GL256N
246
S29GL512N
492
Parameter Symbol
Parameter Description
Test Setup
Typ
Max
Unit
CIN
Input Capacitance
VIN = 0
TSOP
6
7.5
pF
BGA
4.2
5.0
pF
COUT
Output Capacitance
VOUT = 0
TSOP
8.5
12
pF
BGA
5.4
6.5
pF
CIN2
Control Pin Capacitance
VIN = 0
TSOP
7.5
9
pF
BGA
3.9
4.7
pF
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