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| 型號： | S29GL256N10FAI010 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 16M X 16 FLASH 3V PROM, 100 ns, PBGA64 |
| 封裝： | 13 X 11 MM, FBGA-64 |
| 文件頁數(shù)： | 64/95頁 |
| 文件大?。?/td> | 3781K |
| 代理商： | S29GL256N10FAI010 |
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May 30, 2008 S29GL-N_00_B8
S29GL-N
67
Data
She e t
10.4
DQ2: Toggle Bit II
The Toggle Bit II on DQ2, when used with DQ6, indicates whether a particular sector is actively erasing (that
is, the Embedded Erase algorithm is in progress), or whether that sector is erase-suspended. Toggle Bit II is
valid after the rising edge of the final WE# pulse in the command sequence.
DQ2 toggles when the system reads at addresses within those sectors that have been selected for erasure.
(The system may use either OE# or CE# to control the
read cycles.) But DQ2 cannot distinguish whether the sector is actively erasing or is erase-suspended. DQ6,
by comparison, indicates whether the device is actively erasing, or is in Erase Suspend, but cannot
distinguish which sectors are selected for erasure. Thus, both status bits are required for sector and mode
information. Refer to Table 10.1 on page 68 to compare outputs for DQ2 and DQ6.
Figure 10.2 on page 66 shows the toggle bit algorithm in flowchart form, and the section DQ2: Toggle Bit II
on page 67 explains the algorithm. See also the RY/BY#: Ready/Busy# on page 65. Figure 15.8 on page 78
shows the toggle bit timing diagram. Figure 15.9 on page 78 shows the differences between DQ2 and DQ6 in
graphical form.
10.5
Reading Toggle Bits DQ6/DQ2
Refer to Figure 10.2 on page 66 and Figure 15.9 on page 78 for the following discussion. Whenever the
system initially begins reading toggle bit status, it must read DQ7–DQ0 at least twice in a row to determine
whether a toggle bit is toggling. Typically, the system would note and store the value of the toggle bit after the
first read. After the second read, the system would compare the new value of the toggle bit with the first. If the
toggle bit is not toggling, the device has completed the program or erase operation. The system can read
array data on DQ7–DQ0 on the following read cycle.
However, if after the initial two read cycles, the system determines that the toggle bit is still toggling, the
system also should note whether the value of DQ5 is high (see the section on DQ5). If it is, the system should
then determine again whether the toggle bit is toggling, since the toggle bit may have stopped toggling just as
DQ5 went high. If the toggle bit is no longer toggling, the device has successfully completed the program or
erase operation. If it is still toggling, the device did not completed the operation successfully, and the system
must write the reset command to return to reading array data.
The remaining scenario is that the system initially determines that the toggle bit is toggling and DQ5 has not
gone high. The system may continue to monitor the toggle bit and DQ5 through successive read cycles,
determining the status as described in the previous paragraph. Alternatively, it may choose to perform other
system tasks. In this case, the system must start at the beginning of the algorithm when it returns to
determine the status of the operation (top of Figure 10.2 on page 66).
10.6
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program, erase, or write-to-buffer time has exceeded a specified internal pulse
count limit. Under these conditions DQ5 produces a 1, indicating that the program or erase cycle was not
successfully completed.
The device may output a 1 on DQ5 if the system tries to program a 1 to a location that was previously
programmed to 0. Only an erase operation can change a 0 back to a 1. Under this condition, the device
halts the operation, and when the timing limit is exceeded, DQ5 produces a 1.
In all these cases, the system must write the reset command to return the device to the reading the array (or
to erase-suspend-read if the device was previously in the erase-suspend-program mode).
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| S29GL256N10FFI010 | 制造商:Spansion 功能描述:NOR Flash Parallel 3V/3.3V 256Mbit 32M/16M x 8bit/16bit 100ns 64-Pin Fortified BGA Tray 制造商:Spansion 功能描述:MIRRORBIT FLASH 256MB SMD 29LV256 |
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| S29GL256N10TFI010 | 功能描述:IC FLASH 制造商:cypress semiconductor corp 系列:GL-N 包裝:托盤 零件狀態(tài):在售 存儲器類型:非易失 存儲器格式:閃存 技術(shù):FLASH - NOR 存儲容量:256Mb （32M x 8，16M x 16） 寫周期時間 - 字，頁:100ns 訪問時間:100ns 存儲器接口:并聯(lián) 電壓 - 電源:2.7 V ~ 3.6 V 工作溫度:-40°C ~ 85°C（TA） 安裝類型:表面貼裝 封裝/外殼:56-TFSOP（0.724"，18.40mm 寬） 供應(yīng)商器件封裝:56-TSOP 標(biāo)準包裝:91 |
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