參數(shù)資料
型號(hào): S1C63466F
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP144
封裝: PLASTIC, QFP8-144
文件頁數(shù): 54/135頁
文件大?。?/td> 1053K
代理商: S1C63466F
S1C63466 TECHNICAL MANUAL
EPSON
17
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Memory Map)
Address
Comment
D3
D2
Register
D1
D0
Name
Init 1
10
FF06H
FOUTE
0
FOFQ1 FOFQ0
R/W
R
R/W
FOUTE
0 3
FOFQ1
FOFQ0
0
2
0
Enable
Disable FOUT output enable
Unused
FOUT
frequency
selection
FF05H
0
SVDDT SVDON
R
R/W
0 3
SVDDT
SVDON
2
0
Low
On
Normal
Off
Unused
SVD evaluation data
SVD circuit On/Off
FF07H
0
WDEN WDRST
R/W
W
R
0 3
WDEN
WDRST3
2
1
Reset
Enable
Reset
Disable
Invalid
Unused
Watchdog timer enable
Watchdog timer reset (writing)
FF04H
SVDS3 SVDS2 SVDS1 SVDS0
R/W
SVDS3
SVDS2
SVDS1
SVDS0
0
SVD criteria voltage setting
FF00H
CLKCHG OSCC
0
VDC
R
R/W
CLKCHG
OSCC
0 3
VDC
0
2
0
OSC3
On
2.2 V
OSC1
Off
1.3 V
CPU clock switch
OSC3 oscillation On/Off
Unused
CPU operating voltage switch (1.3 V: OSC1, 2.2 V: OSC3)
FF20H
SIK03
SIK02
SIK01
SIK00
R/W
SIK03
SIK02
SIK01
SIK00
0
Enable
Disable
K00–K03 interrupt selection register
FF21H
K03
K02
K01
K00
R
K03
K02
K01
K00
2
High
Low
K00–K03 input port data
FF22H
KCP03
KCP02
KCP01
KCP00
R/W
KCP03
KCP02
KCP01
KCP00
1
K00–K03 input comparison register
FF24H
SIK13
SIK12
SIK11
SIK10
R/W
SIK13
SIK12
SIK11
SIK10
0
Enable
Disable
K10–K13 interrupt selection register
FF25H
K13
K12
K11
K10
R
K13
K12
K11
K10
2
High
Low
K10–K13 input port data
FF26H
KCP13
KCP12
KCP11
KCP10
R/W
KCP13
KCP12
KCP11
KCP10
1
K10–K13 input comparison register
0
1.85/1.05
8
2.60
1
1.90
9
2.70
2
2.00
10
2.80
3
2.10
11
2.90
4
2.20
12
3.00
5
2.30
13
3.10
6
2.40
14
3.20
7
2.50
15
3.30
[SVDS3–0]
Voltage(V)
[SVDS3–0]
Voltage(V)
0
fOSC1/64
1
fOSC1/8
2
fOSC1
3
fOSC3
[FOFQ1, 0]
Frequency
FF30H
R03HIZ R02HIZ R01HIZ R00HIZ
R/W
R03HIZ
R02HIZ
R01HIZ
R00HIZ
0
High-Z
Output
R03 output high impedance control (FOUTE=0)
FOUT output high impedance control (FOUTE=1)
R02 output high impedance control (PTOUT=0)
TOUT output high impedance control (PTOUT=1)
R01 output high impedance control
R00 output high impedance control
FF31H
R03
R02
R01
R00
R/W
R03
R02
R01
R00
1
High
Low
R03 output port data (FOUTE=0) Fix at "1" when FOUT is used
R02 output port data (PTOUT=0) Fix at "1" when TOUT is used
R01 output port data
R00 output port data
Table 4.1.1 (a) I/O memory map (FF00H–FF31H)
Remarks
1 Initial value at initial reset
2 Not set in the circuit
3 Constantly "0" when being read
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