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參數(shù)資料
| 型號： | S1C63466F |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | PLASTIC, QFP8-144 |
| 文件頁數(shù)： | 118/135頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | S1C63466F |
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S1C63466 TECHNICAL MANUAL
EPSON
75
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Programmable Timer)
EIPT0: Timer 0 interrupt mask register (FFE2HD0)
EIPT1: Timer 1 interrupt mask register (FFE2HD1)
These registers are used to select whether to mask the programmable timer interrupt or not.
When "1" is written: Enabled
When "0" is written: Masked
Reading: Valid
Timer 0 and timer 1 interrupts can be masked individually by the interrupt mask registers EIPT0 (timer 0)
and EIPT1 (timer 1).
At initial reset, these registers are set to "0".
IPT0: Timer 0 interrupt factor flag (FFF2HD0)
IPT1: Timer 1 interrupt factor flag (FFF2HD1)
These flags indicate the status of the programmable timer interrupt.
When "1" is read: Interrupt has occurred
When "0" is read: Interrupt has not occurred
When "1" is written: Flag is reset
When "0" is written: Invalid
The interrupt factor flags IPT0 and IPT1 correspond to timer 0 and timer 1 interrupts, respectively. The
software can judge from these flags whether there is a programmable timer interrupt. However, even if
the interrupt is masked, the flags are set to "1" by the underflows of the corresponding counters.
These flags are reset to "0" by writing "1" to them.
After an interrupt occurs, the same interrupt will occur again if the interrupt enabled state (I flag = "1") is
set or the RETI instruction is executed unless the interrupt factor flag is reset. Therefore, be sure to reset
(write "1" to) the interrupt factor flag in the interrupt service routine before shifting to the interrupt
enabled state.
At initial reset, these flags are set to "0".
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