參數(shù)資料
型號: S1C63455D
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 4.1 MHz, MICROCONTROLLER, UUC105
封裝: DIE-105
文件頁數(shù): 23/119頁
文件大小: 865K
代理商: S1C63455D
118
Rev. 1.0
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
with DATA SLICER and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306H1SFP
(1) Function for outputting a parity error signal
With the error signal output enable bit (bit 7 of address 037D16) assigned “1”, you can output an “L”
level from the TxD2 pin when a parity error is detected. In step with this function, the generation timing
of a transmission completion interrupt changes to the detection timing of a parity error signal. Figure
2.11.23 shows the output timing of the parity error signal.
ST : Start bit
P : Even Parity
SP : Stop bit
D0
D1
D2
D3
D4
D5
D6
D7
P
SP
ST
Hi-Z
Transfer
clock
RxD2
TxD2
Receive
complete flag
“H”
“L”
“H”
“L”
“H”
“L”
“1”
LSB first
“0”
P : Even parity
D0
D1
D2
D3
D4
D5
D6
D7
P
Transfer
clcck
TxD2
(direct)
TxD2
(inverse)
D7
D6
D5
D4
D3
D2
D1
D0
P
Figure 2.11.23 Output timing of the parity error signal
(2) Direct format/inverse format
Connecting the SIM card allows you to switch between direct format and inverse format. If you choose
the direct format, D0 data is output from TxD2. If you choose the inverse format, D7 data is inverted
and output from TxD2.
Figure 2.11.24 shows the SIM interface format.
Figure 2.11.24 SIM interface format
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