參數(shù)資料
型號(hào): S-35390A-T8T1
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: REAL TIME CLOCK, PDSO8
封裝: TSSOP-8
文件頁(yè)數(shù): 7/48頁(yè)
文件大?。?/td> 542K
代理商: S-35390A-T8T1
S1C88816 TECHNICAL MANUAL
EPSON
7
1 INTRODUCTION
Outline of mask options
(1) OSC1 oscillation circuit
The specification of the OSC1 oscillation circuit
can be selected from among four types: "Crystal
oscillation", "CR oscillation", "Crystal oscillation
(gate capacitor built-in)" and "External clock
input". Refer to Section 5.3.3, "OSC1 oscillation
circuit", for details.
(2) OSC3 oscillation circuit
The specification of the OSC3 oscillation circuit
can be selected from among four types: "Crystal
oscillation", "Ceramic oscillation", "CR oscillation"
and "External clock input". Refer to Section 5.3.4,
"OSC3 oscillation circuit", for details.
(3) Multiple key entry reset (K00–K03)
This function resets the IC when several keys
are pressed simultaneously. The mask option is
used to select whether this function is used or
not. Further when the function is used, a
combination of the input ports (K00–K03),
which are connected to the keys to be pressed
simultaneously, can be selected. Refer to Section
4.1.2, "Simultaneous LOW level input at input
port terminals K00–K03", for details.
(4) Initial reset by SVD circuit
The SVD circuit has a function that generates an
initial reset signal when the supply voltage
drops to level 0 or less. The mask option is used
to select whether this function is used or not.
Refer to Section 5.14, "Supply Voltage Detection
(SVD) Circuit", for details.
(5) Input port/RESET terminal pull-up resistor
This mask option can select whether the pull-up
resistor for the input port terminal is used or
not. It is possible to select for each bit of the
input ports. Refer to Section 5.4, "Input Ports (K
ports)", for details.
Furthermore, a pull-up option is also provided
for the RESET terminal.
(6) I/O port pull-up resistor
This mask option can select whether the pull-up
resistor for the I/O port terminal (it works
during input mode) is used or not. It is possible
to select for each bit of the I/O ports. Refer to
Section 5.6, "I/O Ports (P ports)", for details.
Since P10 to P13 are shared with the serial
interface I/O terminals, the selected P10 and
P12 terminal configuration is applied to the
serial input (SIN) terminal and serial clock input
terminal (SCLK in clock synchronous mode)
when the serial interface is used. Refer to
Section 5.7, "Serial Interface", for details.
(7) LCD drive duty
The drive duty for the built-in LCD driver can
be selected whether it will be 1/32 and 1/16
software-switched or fixed at 1/8. Refer to
Section 5.11, "LCD Controller", for details.
(8) LCD power supply
Either the internal power supply or an external
power supply can be selected as the LCD
system power source. Furthermore, when using
the internal power supply, the LCD drive
voltage can be set for a 4.5 V panel or a 5.5 V
panel and the drive bias to 1/5 or 1/4. Refer to
Section 5.11, "LCD Controller", for details.
(9) BZ output (R51 port specification)
The R51 port can be configured as a general
purpose output port or as the BZ output port
(BZ inverted output). Refer to Section 5.5,
"Output Ports (R ports)" for details.
(10) TOUT output (R26 port specification)
The R26 port can be configured as a general
purpose output port or as the TOUT output
port (TOUT inverted output). Refer to Section
5.5, "Output Ports (R ports)" for details.
(11) CPU mode
The CPU mode of the S1C88 core can select
either maximum mode or minimum mode
(fixed after selection).
In the maximum mode, since the S1C88816
saves the program counter (PC), system
condition flag (SC) and code bank register (CB)
values into the stack when an interrupt is
generated, the program sequence is able to
return to the previous bank if the interrupt
handler routines change banks without saving.
The minimum mode can be selected only when
the program code size is less than 52K bytes
and the "Compact code" model is specified
using the EPSON C Compiler.
Since the subroutine call in the minimum mode
accesses the stack area with a 2-byte address (3
bytes in maximum mode), it has better RAM-
access efficiency and process-cycle time than
the maximum mode.
(12) Heavy load protection mode during
buzzer output
This option allows selection whether the heavy
load protection mode is set or not when the
buzzer (BZ) signal is output.
When direct driving a piezoelectric buzzer,
select Normal mode to reduce current
consumption. When using an external bipolar
transistor, select Heavy load protection mode.
Refer to Section 2.3, "Heavy Load Protection
Mode", for details.
(13) Heavy load protection mode during
melody output
This option allows selection whether the heavy
load protection mode is set or not when the
melody (MOUT) signal is output.
When direct driving a piezoelectric buzzer,
select Normal mode to reduce current
consumption. When using an external bipolar
transistor, select Heavy load protection mode.
Refer to Section 2.3, "Heavy Load Protection
Mode", for details.
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