參數(shù)資料
型號(hào)： S-35390A-T8T1
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： REAL TIME CLOCK, PDSO8
封裝： TSSOP-8
文件頁數(shù)： 36/48頁
文件大?。?/td> 542K
代理商： S-35390A-T8T1
S1C88816 TECHNICAL MANUAL
EPSON
33
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Input Ports)
5.4.3 Interrupt function and input
comparison register
Input port K00–K07 and K10 are all equipped with
an interrupt function. These input ports are divided
into three groupings: K00–K03 (K0L), K04–K07
(K0H) and K10 (K1). Furthermore, the interrupt
generation condition for each series of terminals
can be set by software.
When the interrupt generation condition set for
each series of terminals is met, the interrupt factor
flag FK0L, FK0H or FK1 corresponding to the
applicable series is set at "1" and an interrupt is
generated.
Interrupt can be prohibited by setting the interrupt
enable registers EK0L, EK0H and EK1 for the
corresponding interrupt factor flags.
Furthermore, the priority level for input interrupt
can be set at the desired level (0–3) using the
interrupt priority registers PK00–PK01 and PK10–
PK11 corresponding to each of two groups K0x
(K00–K07) and K10.
For details on the interrupt control registers for the
above and on operations subsequent to interrupt
generation, see "5.16 Interrupt and Standby Status".
The exception processing vectors for each interrupt
factor are set as follows:
K10 input interrupt:
00000AH
K04–K07 input interrupt: 00000CH
K00–K03 input interrupt: 00000EH
Figure 5.4.3.1 shows the configuration of the input
interrupt circuit.
Data
bus
K00
Input comparison
register KCP00
Address
K01
K02
K03
Input port
K00D
Interrupt factor
flag FK0L
Address
K04
Input comparison
register KCP04
Address
K05
K06
K07
Input port
K04D
Address
K10
Input comparison
register KCP10
Interrupt selection
register SIK00
Interrupt selection
register SIK04
Interrupt selection
register SIK10
Address
Input port
K10D
Interrupt priority
level judgement
circuit
Interrupt
priority
register
PK00, PK01
Interrupt priority
level judgement
circuit
Interrupt
priority
register
PK10, PK11
Interrupt
request
Interrupt
request
Interrupt enable
register EK0L
Address
Interrupt factor
flag FK1
Address
Interrupt enable
register EK1
Address
Interrupt factor
flag FK0H
Interrupt enable
register EK0H
Address
Fig. 5.4.3.1 Configuration of input interrupt circuit
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