參數(shù)資料
型號(hào): S-35390A-T8T1
元件分類: 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述: REAL TIME CLOCK, PDSO8
封裝: TSSOP-8
文件頁(yè)數(shù): 42/48頁(yè)
文件大?。?/td> 542K
代理商: S-35390A-T8T1
S1C88816 TECHNICAL MANUAL
EPSON
39
5 PERIPHERAL CIRCUITS AND THEIR OPERATIO (Output Ports)
s TOUT output (R27), TOUT output (R26)
In order for the S1C88816 to provide clock signal to
an external device, the R27 output port terminal can
be used to output the TOUT signal (clock output by
the programmable timer). Furthermore, the R26
output port terminal can be used to output the
TOUT signal (TOUT inverted signal). The configu-
ration of the output ports R26 and R27 is shown in
Figure 5.5.5.1.
Register R27D
Register PTOUT
R27 output
R26 output
Mask option
TOUT signal
Register R26D
Fig. 5.5.5.1 Configuration of R26 and R27
The output control for the TOUT (TOUT) signals is
done by the register PTOUT. When you set "1" for
the PTOUT, the TOUT (TOUT) signal is output
from the R27 (R26) output port terminal. When "0"
is set, the R27 goes HIGH (VDD) and the R26 goes
LOW (VSS).
To output the TOUT signal, "1" must always be set
for the data register R27D.
The data register R26D does not affect the TOUT
output.
The TOUT signal is generated from the
programmable timer underflow signal by halving
the frequency.
With respect to frequency control, see "5.10 Pro-
grammable Timer".
Since the TOUT (TOUT) signal is generated
asynchronously from the register PTOUT, when the
signal is turned ON or OFF by setting the register, a
hazard of a 1/2 cycle or less is generated.
Figure 5.5.5.2 shows the output waveform of the
TOUT (TOUT) signal.
PTOUT
TOUT output (R27)
TOUT output (R26) *
00
1
when selected by mask option
Fig. 5.5.5.2 TOUT (TOUT) output waveform
s FOUT output (R34)
In order for the S1C88816 to provide clock signal to
an external device, the FOUT signal (divided clock
of oscillation clock fOSC1 or fOSC3) can be output
from the output port terminal R34.
Figure 5.5.5.3 shows the configuration of output
port R34.
Register R34D
Register FOUTON
R34 output
FOUT signal
Fig. 5.5.5.3 Configuration of R34
The output control for the FOUT signal is done by
the register FOUTON. When you set "1" for the
FOUTON, the FOUT signal is output from the
output port terminal R34, when "0" is set, the HIGH
(VDD) level is output. At this time, "1" must always
be set for the data register R34D.
The frequency of the FOUT signal can be selected in
software by setting the registers FOUT0–FOUT2.
The frequency is selected any one from among
eight settings as shown in Table 5.5.5.2.
Table 5.5.5.2 FOUT frequency setting
FOUT2
FOUT frequency
0
1
fOSC1 / 1
fOSC1 / 2
fOSC1 / 4
fOSC1 / 8
fOSC3 / 1
fOSC3 / 2
fOSC3 / 4
fOSC3 / 8
FOUT1
0
1
0
1
FOUT0
0
1
0
1
0
1
0
1
fOSC1:
fOSC3:
OSC1 oscillation frequency
OSC3 oscillation frequency
When the FOUT frequency is made "fOSC3/n", you
must turn on the OSC3 oscillation circuit before
outputting FOUT. A time interval of several msec
to several 10 msec, from the turning ON of the
OSC3 oscillation circuit to until the oscillation
stabilizes, is necessary, due to the oscillation
element that is used. Consequently, if an abnormal-
ity occurs as the result of an unstable FOUT signal
being output externally, you should allow an
adequate waiting time after turning ON of the
OSC3 oscillation, before turning outputting FOUT.
(The oscillation start time will vary somewhat
depending on the oscillator and on the externally
attached parts. Refer to the oscillation start time
example indicated in Chapter 7, "ELECTRICAL
CHARACTERISTICS".)
At initial reset, OSC3 oscillation circuit is set to OFF
state.
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