參數(shù)資料
型號: PSD211R
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,可加密,19個(gè)可單獨(dú)配置I/O,通用PLD有12個(gè)輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設(shè)備(可編程邏輯,可加密,19個(gè)可單獨(dú)配置的I / O,通用PLD的有12個(gè)輸入)
文件頁數(shù): 25/32頁
文件大?。?/td> 175K
代理商: PSD211R
PSD211R
2-25
-90
-12
-20
CMiser
On =
Add
Symbol
Parameter
Unit
Min Max Min Max Min Max
T1
ALE or AS Pulse Width
20
30
50
0
ns
T2
Address Set-up Time
5
9
15
0
ns
T3
Address Hold Time
8
9
15
0
ns
T4
T5
Leading Edge of Read to Data Active
ALE Valid to Data Valid
0
0
0
0
ns
ns
100
140
200
10
T6
T7
Address Valid to Data Valid
CSI Active to Data Valid
90
100
120
150
210
200
10
10
ns
ns
T8
Leading Edge of Read to Data Valid
32
36
50
0
ns
Leading Edge of Read to Data Valid in
8031-Based Architecture Operating with PSEN
and RD in Separate Mode
T8A
32
38
60
0
ns
T9
Read Data Hold Time
0
0
0
0
ns
T10
Trailing Edge of Read to Data High-Z
35
35
45
0
ns
Trailing Edge of ALE or AS to Leading Edge
of Write
T11
0
0
0
0
ns
T12
RD, E, PSEN Pulse Width
40
45
75
0
ns
T12A
WR Pulse Width
20
25
45
0
ns
Trailing Edge of Write or Read to Leading Edge
of ALE or AS
T13
5
5
5
0
ns
T14
Address Valid to Trailing Edge of Write
90
120
200
0
ns
T15
CSI Active to Trailing Edge of Write
100
130
200
0
ns
T16
Write Data Set-up Time
20
25
40
0
ns
T17
Write Data Hold Time
5
5
15
0
ns
T18
Port to Data Out Valid Propagation Delay
28
30
45
0
ns
T19
Port Input Hold Time
0
0
0
0
ns
T20
Trailing Edge of Write to Port Output Valid
35
40
60
0
ns
T21
ADi or Control to CSOi Valid
6
25
6
30
5
45
10
ns
T22
ADi or Control to CSOi Invalid
5
25
5
30
4
45
10
ns
T23
Latched Address Outputs, Port A
22
22
28
0
ns
T30
CSI Active to CSOi Active
9
40
9
45
8
60
0
ns
T31
CSI Inactive to CSOi Inactive
9
40
9
45
8
60
0
ns
AC Characteristics
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