參數(shù)資料
型號: PSD211R
英文描述: Field Programmable Microcontroller Peripherals(可編程邏輯,可加密,19個可單獨配置I/O,通用PLD有12個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備(可編程邏輯,可加密,19個可單獨配置的I / O,通用PLD的有12個輸入)
文件頁數(shù): 13/32頁
文件大?。?/td> 175K
代理商: PSD211R
PSD211R
2-13
Port B
The default configuration of Port B is I/O. In this mode, every pin can be set as an input or
output by writing into the respective pin’s direction flip flop (DIR FF, in Figure 5). As an
output, the pin level can be controlled by writing into the respective pin’s data flip flop (DFF,
in Figure 5). When DIR FF = 1, the pin is configured as an output. When DIR FF = 0, the pin
is configured as an input. The controller can read the DIR FF bits by accessing the READ
DIR register; it can read the DFF bits by accessing the READ DATA register. Port B pin
levels can be read by accessing the READ PIN register. For addressing information, refer to
Table 6.
Alternately, each bit of Port B can be configured to provide a chip-select output signal from
PAD B. PB0–PB7 can provide CS0–CS7, respectively. Each of the signals CS0–CS3 is
comprised of four product terms.Thus, up to four ANDed expressions can be ORed while
deriving any of these signals. Each of the signals CS4–CS7 is comprised of two product
terms. Thus, up to two ANDed expressions can be ORed while deriving any of these
signals.
Port Functions
(cont.)
Figure 5. Port B Pin Structure
READ PIN
READ DATA
PORT B PIN
OUT
WRITE DATA
CK
DR
DFF
ENABLE
MUX
CSI
CONTROL
DIR
FF
D
CK
R
WRITE DIR
RESET
READ DIR
I
N
T
E
R
N
A
L
I
N
T
E
R
N
A
L
C
S
O
U
T
D
A
T
A
B
U
S
B
U
S
C
S
0
7
D
8
D
1
5
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