B0DLC(8) Receive " />
鍙冩暩璩囨枡
鍨嬭櫉锛� PIC18F4585-I/P
寤犲晢锛� Microchip Technology
鏂囦欢闋佹暩锛� 309/322闋�
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC MCU FLASH 24KX16 40DIP
鐢㈠搧鍩硅〒妯″锛� Asynchronous Stimulus
8-bit PIC® Microcontroller Portfolio
妯欐簴鍖呰锛� 10
绯诲垪锛� PIC® 18F
鏍稿績铏曠悊鍣細 PIC
鑺珨灏哄锛� 8-浣�
閫熷害锛� 40MHz
閫ｉ€氭€э細 CAN锛孖²C锛孲PI锛孶ART/USART
澶栧湇瑷倷锛� 娆犲妾㈡脯/寰╀綅锛孒LVD锛孭OR锛孭WM锛學DT
杓稿叆/杓稿嚭鏁革細 36
绋嬪簭瀛樺劜鍣ㄥ閲忥細 48KB锛�24K x 16锛�
绋嬪簭瀛樺劜鍣ㄩ鍨嬶細 闁冨瓨
EEPROM 澶у皬锛� 1K x 8
RAM 瀹归噺锛� 3.25K x 8
闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.2 V ~ 5.5 V
鏁告摎杞夋彌鍣細 A/D 11x10b
鎸暕鍣ㄥ瀷锛� 鍏ч儴
宸ヤ綔婧害锛� -40°C ~ 85°C
灏佽/澶栨锛� 40-DIP锛�0.600"锛�15.24mm锛�
鍖呰锛� 绠′欢
鐢㈠搧鐩寗闋侀潰锛� 645 (CN2011-ZH PDF)
閰嶇敤锛� I3-DB18F4680-ND - BOARD DAUGHTER ICEPIC3
DVA18XP400-ND - DEVICE ADAPTER 18F4220 PDIP 40LD
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
ACICE0206-ND - ADAPTER MPLABICE 40P 600 MIL
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�绗�8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�绗�53闋�绗�54闋�绗�55闋�绗�56闋�绗�57闋�绗�58闋�绗�59闋�绗�60闋�绗�61闋�绗�62闋�绗�63闋�绗�64闋�绗�65闋�绗�66闋�绗�67闋�绗�68闋�绗�69闋�绗�70闋�绗�71闋�绗�72闋�绗�73闋�绗�74闋�绗�75闋�绗�76闋�绗�77闋�绗�78闋�绗�79闋�绗�80闋�绗�81闋�绗�82闋�绗�83闋�绗�84闋�绗�85闋�绗�86闋�绗�87闋�绗�88闋�绗�89闋�绗�90闋�绗�91闋�绗�92闋�绗�93闋�绗�94闋�绗�95闋�绗�96闋�绗�97闋�绗�98闋�绗�99闋�绗�100闋�绗�101闋�绗�102闋�绗�103闋�绗�104闋�绗�105闋�绗�106闋�绗�107闋�绗�108闋�绗�109闋�绗�110闋�绗�111闋�绗�112闋�绗�113闋�绗�114闋�绗�115闋�绗�116闋�绗�117闋�绗�118闋�绗�119闋�绗�120闋�绗�121闋�绗�122闋�绗�123闋�绗�124闋�绗�125闋�绗�126闋�绗�127闋�绗�128闋�绗�129闋�绗�130闋�绗�131闋�绗�132闋�绗�133闋�绗�134闋�绗�135闋�绗�136闋�绗�137闋�绗�138闋�绗�139闋�绗�140闋�绗�141闋�绗�142闋�绗�143闋�绗�144闋�绗�145闋�绗�146闋�绗�147闋�绗�148闋�绗�149闋�绗�150闋�绗�151闋�绗�152闋�绗�153闋�绗�154闋�绗�155闋�绗�156闋�绗�157闋�绗�158闋�绗�159闋�绗�160闋�绗�161闋�绗�162闋�绗�163闋�绗�164闋�绗�165闋�绗�166闋�绗�167闋�绗�168闋�绗�169闋�绗�170闋�绗�171闋�绗�172闋�绗�173闋�绗�174闋�绗�175闋�绗�176闋�绗�177闋�绗�178闋�绗�179闋�绗�180闋�绗�181闋�绗�182闋�绗�183闋�绗�184闋�绗�185闋�绗�186闋�绗�187闋�绗�188闋�绗�189闋�绗�190闋�绗�191闋�绗�192闋�绗�193闋�绗�194闋�绗�195闋�绗�196闋�绗�197闋�绗�198闋�绗�199闋�绗�200闋�绗�201闋�绗�202闋�绗�203闋�绗�204闋�绗�205闋�绗�206闋�绗�207闋�绗�208闋�绗�209闋�绗�210闋�绗�211闋�绗�212闋�绗�213闋�绗�214闋�绗�215闋�绗�216闋�绗�217闋�绗�218闋�绗�219闋�绗�220闋�绗�221闋�绗�222闋�绗�223闋�绗�224闋�绗�225闋�绗�226闋�绗�227闋�绗�228闋�绗�229闋�绗�230闋�绗�231闋�绗�232闋�绗�233闋�绗�234闋�绗�235闋�绗�236闋�绗�237闋�绗�238闋�绗�239闋�绗�240闋�绗�241闋�绗�242闋�绗�243闋�绗�244闋�绗�245闋�绗�246闋�绗�247闋�绗�248闋�绗�249闋�绗�250闋�绗�251闋�绗�252闋�绗�253闋�绗�254闋�绗�255闋�绗�256闋�绗�257闋�绗�258闋�绗�259闋�绗�260闋�绗�261闋�绗�262闋�绗�263闋�绗�264闋�绗�265闋�绗�266闋�绗�267闋�绗�268闋�绗�269闋�绗�270闋�绗�271闋�绗�272闋�绗�273闋�绗�274闋�绗�275闋�绗�276闋�绗�277闋�绗�278闋�绗�279闋�绗�280闋�绗�281闋�绗�282闋�绗�283闋�绗�284闋�绗�285闋�绗�286闋�绗�287闋�绗�288闋�绗�289闋�绗�290闋�绗�291闋�绗�292闋�绗�293闋�绗�294闋�绗�295闋�绗�296闋�绗�297闋�绗�298闋�绗�299闋�绗�300闋�绗�301闋�绗�302闋�绗�303闋�绗�304闋�绗�305闋�绗�306闋�绗�307闋�绗�308闋�鐣跺墠绗�309闋�绗�310闋�绗�311闋�绗�312闋�绗�313闋�绗�314闋�绗�315闋�绗�316闋�绗�317闋�绗�318闋�绗�319闋�绗�320闋�绗�321闋�绗�322闋�
2007 Microchip Technology Inc.
Preliminary
DS39625C-page 85
PIC18F2585/2680/4585/4680
B0DLC(8)
Receive mode
鈥�
RXRTR
RB1
RB0
DLC3
DLC2
DLC1
DLC0
-xxx xxxx
B0DLC(8)
Transmit mode
鈥擳XRTR
鈥�
DLC3
DLC2
DLC1
DLC0
-x-- xxxx
B0EIDL(8)
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
B0EIDH(8)
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
B0SIDL(8)
Receive mode
SID2
SID1
SID0
SRR
EXID
鈥擡ID17
EID16
xxxx x-xx
B0SIDL(8)
Transmit mode
SID2
SID1
SID0
鈥�
EXIDE
鈥擡ID17
EID16
xxx- x-xx
B0SIDH(8)
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
B0CON(8)
Receive mode
RXFUL
RXM1
RXRTRRO
FILHIT4
FILHIT3
FILHIT2
FILHIT1
FILHIT0
0000 0000
B0CON(8)
Transmit mode
TXBIF
TXABT
TXLARB
TXERR
TXREQ
RTREN
TXPRI1
TXPRI0
0000 0000
TXBIE
鈥�
TXB2IE
TXB1IE
TXB0IE
鈥�
---0 00--
BIE0
B5IE
B4IE
B3IE
B2IE
B1IE
B0IE
RXB1IE
RXB0IE
0000 0000
BSEL0
B5TXEN
B4TXEN
B3TXEN
B2TXEN
B1TXEN
B0TXEN
鈥�
0000 00--
MSEL3
FIL15_1
FIL15_0
FIL14_1
FIL14_0
FIL13_1
FIL13_0
FIL12_1
FIL12_0
0000 0000
MSEL2
FIL11_1
FIL11_0
FIL10_1
FIL10_0
FIL9_1
FIL9_0
FIL8_1
FIL8_0
0000 0000
MSEL1
FIL7_1
FIL7_0
FIL6_1
FIL6_0
FIL5_1
FIL5_0
FIL4_1
FIL4_0
0000 0101
MSEL0
FIL3_1
FIL3_0
FIL2_1
FIL2_0
FIL1_1
FIL1_0
FIL0_1
FIL0_0
0101 0000
RXFBCON7
F15BP_3
F15BP_2
F15BP_1
F15BP_0
F14BP_3
F14BP_2
F14BP_1
F14BP_0
0000 0000
RXFBCON6
F13BP_3
F13BP_2
F13BP_1
F13BP_0
F12BP_3
F12BP_2
F12BP_1
F12BP_0
0000 0000
RXFBCON5
F11BP_3
F11BP_2
F11BP_1
F11BP_0
F10BP_3
F10BP_2
F10BP_1
F10BP_0
0000 0000
RXFBCON4
F9BP_3
F9BP_2
F9BP_1
F9BP_0
F8BP_3
F8BP_2
F8BP_1
F8BP_0
0000 0000
RXFBCON3
F7BP_3
F7BP_2
F7BP_1
F7BP_0
F6BP_3
F6BP_2
F6BP_1
F6BP_0
0000 0000
RXFBCON2
F5BP_3
F5BP_2
F5BP_1
F5BP_0
F4BP_3
F4BP_2
F4BP_1
F4BP_0
0001 0001
RXFBCON1
F3BP_3
F3BP_2
F3BP_1
F3BP_0
F2BP_3
F2BP_2
F2BP_1
F2BP_0
0001 0001
RXFBCON0
F1BP_3
F1BP_2
F1BP_1
F1BP_0
F0BP_3
F0BP_2
F0BP_1
F0BP_0
0000 0000
SDFLC
鈥�
FLC4
FLC3
FLC2
FLC1
FLC0
---0 0000
RXFCON1
RXF15EN
RXF14EN
RXF13EN
RXF12EN
RXF11EN
RXF10EN
RXF9EN
RXF8EN
0000 0000
RXFCON0
RXF7EN
RXF6EN
RXF5EN
RXF4EN
RXF3EN
RXF2EN
RXF1EN
RXF0EN
0000 0000
RXF15EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
RXF15EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
RXF15SIDL
SID2
SID1
SID0
鈥�
EXIDEN
鈥擡ID17
EID16
xxx- x-xx
RXF15SIDH
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
RXF14EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
RXF14EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
RXF14SIDL
SID2
SID1
SID0
鈥�
EXIDEN
鈥擡ID17
EID16
xxx- x-xx
RXF14SIDH
SID10
SID9
SID8
SID7
SID6
SID5
SID4
SID3
xxxx xxxx
RXF13EIDL
EID7
EID6
EID5
EID4
EID3
EID2
EID1
EID0
xxxx xxxx
RXF13EIDH
EID15
EID14
EID13
EID12
EID11
EID10
EID9
EID8
xxxx xxxx
TABLE 5-2:
REGISTER FILE SUMMARY (PIC18F2585/2680/4585/4680) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details
on page:
Legend: x = unknown, u = unchanged, - = unimplemented, q = value depends on condition
Note 1:
Bit 21 of the PC is only available in Test mode and Serial Programming modes.
2:
The SBOREN bit is only available when CONFIG2L<1:0> = 01; otherwise, it is disabled and reads as 鈥�0鈥�. See Section 4.4 鈥淏rown-out Reset
(BOR)鈥�.
3:
These registers and/or bits are not implemented on PIC18F2X8X devices and are read as 鈥�0鈥�. Reset values are shown for PIC18F4X8X
devices; individual unimplemented bits should be interpreted as 鈥樷€斺€�.
4:
The PLLEN bit is only available in specific oscillator configuration; otherwise, it is disabled and reads as 鈥�0鈥�. See Section 2.6.4 鈥淧LL in
INTOSC Modes鈥�.
5:
The RE3 bit is only available when Master Clear Reset is disabled (CONFIG3H<7> = 0); otherwise, RE3 reads as 鈥�0鈥�. This bit is read-only.
6:
RA6/RA7 and their associated latch and direction bits are individually configured as port pins based on various primary oscillator modes.
When disabled, these bits read as 鈥�0鈥�.
7:
CAN bits have multiple functions depending on the selected mode of the CAN module.
8:
This register reads all 鈥�0鈥檚 until the ECAN technology is set up in Mode 1 or Mode 2.
9:
These registers are available on PIC18F4X8X devices only.
鐩搁棞PDF璩囨枡
PDF鎻忚堪
PIC18F2680-I/SO IC MCU FLASH 32KX16 28SOIC
1-1469387-1 GUIDE MODULE MALE VERT SHORT
1-200871-0 CONN JACKSCREW LONG MALE
1-1469373-1 MOD ATCA GUIDE R/A FEMALE
PIC18F8527-I/PT IC PIC MCU FLASH 24KX16 80TQFP
鐩搁棞浠ｇ悊鍟�/鎶€琛撳弮鏁�
鍙冩暩鎻忚堪
PIC18F4585T-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 48KB 3328 RAM w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F4585T-I/PT 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 48KB 3328 RAM w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F458-E/L 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 1536 RAM 34 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F458-E/P 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 1536 RAM 34 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
PIC18F458-E/PT 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 1536 RAM 34 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁告摎绺界窔瀵害:8 bit 鏈€澶ф檪閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜鍣ㄥぇ灏�:16 KB 鏁告摎 RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰ㄦ牸:SMD/SMT
鐧�(f膩)甯冪穵鎬ラ噰璩�锛�3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京銆�

閲囪臣闇€姹�

(鑻ュ彧閲囪臣涓€姊濆瀷铏�锛屽～瀵竴琛屽嵆鍙�)

鐧�(f膩)甯冩垚鍔燂紒鎮ㄥ彲浠ョ辜绾�(x霉)鐧�(f膩)甯冮噰璩�銆備篃鍙互閫插叆鎴戠殑鍚庤嚭锛屾煡鐪嬪牨鍍�

鐧�(f膩)甯冩垚鍔燂紒鎮ㄥ彲浠ョ辜绾�(x霉)鐧�(f膩)甯冮噰璩�銆備篃鍙互閫插叆鎴戠殑鍚庤嚭锛屾煡鐪嬪牨鍍�

*鍨嬭櫉 *鏁搁噺 寤犲晢 鎵硅櫉 灏佽
娣诲姞鏇村閲囪臣

鎴戠殑鑱郴鏂瑰紡

*
*
*
    • 鎴�
    • 閲囪喘
    • 鎼滅储
    • 浼氬憳