[ label ] MOVFF f
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� PIC18F4585-I/P
寤犲晢锛� Microchip Technology
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8-bit PIC® Microcontroller Portfolio
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鏍稿績铏曠悊鍣細 PIC
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闆诲 - 闆绘簮 (Vcc/Vdd)锛� 4.2 V ~ 5.5 V
鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒锛� A/D 11x10b
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鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 645 (CN2011-ZH PDF)
閰嶇敤锛� I3-DB18F4680-ND - BOARD DAUGHTER ICEPIC3
DVA18XP400-ND - DEVICE ADAPTER 18F4220 PDIP 40LD
444-1001-ND - DEMO BOARD FOR PICMICRO MCU
ACICE0206-ND - ADAPTER MPLABICE 40P 600 MIL
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PIC18FXX39
DS30485A-page 236
Preliminary
2002 Microchip Technology Inc.
MOVFF
Move f to f
Syntax:
[ label ] MOVFF fs,fd
Operands:
0
鈮� fs 鈮� 4095
0
鈮� fd 鈮� 4095
Operation:
(fs) 鈫� fd
Status Affected:
None
Encoding:
1st word (source)
2nd word (destin.)
1100
1111
ffff
fff
fs
fff
fd
Description:
The contents of source register 'fs'
are moved to destination register
'fd'. Location of source 'fs' can be
anywhere in the 4096 byte data
space (000h to FFFh), and location
of destination 'fd' can also be any-
where from 000h to FFFh.
Either source or destination can be
W (a useful special situation).
MOVFF
is particularly useful for
transferring a data memory location
to a peripheral register (such as the
transmit buffer or an I/O port).
The MOVFF instruction cannot use
the PCL, TOSU, TOSH or TOSL as
the destination register.
Note: The MOVFF instruction
should not be used to mod-
ify interrupt settings while
any interrupt is enabled.
See Section 8.0 for more
information.
Words:
2
Cycles:
2 (3)
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
(src)
Process
Data
No
operation
Decode
No
operation
No dummy
read
No
operation
Write
register 'f'
(dest)
Example:
MOVFF
REG1, REG2
Before Instruction
REG1
=
0x33
REG2
=
0x11
After Instruction
REG1
=
0x33,
REG2
=
0x33
MOVLB
Move literal to low nibble in BSR
Syntax:
[ label ] MOVLB k
Operands:
0
鈮� k 鈮� 255
Operation:
k
鈫� BSR
Status Affected:
None
Encoding:
0000
0001
kkkk
Description:
The 8-bit literal 'k' is loaded into
the Bank Select Register (BSR).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal
'k'
Process
Data
Write
literal 'k' to
BSR
Example:
MOVLB
5
Before Instruction
BSR register =
0x02
After Instruction
BSR register =
0x05
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
PIC18F2680-I/SO IC MCU FLASH 32KX16 28SOIC
1-1469387-1 GUIDE MODULE MALE VERT SHORT
1-200871-0 CONN JACKSCREW LONG MALE
1-1469373-1 MOD ATCA GUIDE R/A FEMALE
PIC18F8527-I/PT IC PIC MCU FLASH 24KX16 80TQFP
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
PIC18F4585T-I/ML 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 48KB 3328 RAM w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC18F4585T-I/PT 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 48KB 3328 RAM w/ECAN RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC18F458-E/L 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 1536 RAM 34 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC18F458-E/P 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 1536 RAM 34 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
PIC18F458-E/PT 鍔熻兘鎻忚堪:8浣嶅井鎺у埗鍣� -MCU 32KB 1536 RAM 34 I/O RoHS:鍚� 鍒堕€犲晢:Silicon Labs 鏍稿績:8051 铏曠悊鍣ㄧ郴鍒�:C8051F39x 鏁�(sh霉)鎿�(j霉)绺界窔瀵害:8 bit 鏈€澶ф檪(sh铆)閻橀牷鐜�:50 MHz 绋嬪簭瀛樺劜(ch菙)鍣ㄥぇ灏�:16 KB 鏁�(sh霉)鎿�(j霉) RAM 澶у皬:1 KB 鐗囦笂 ADC:Yes 宸ヤ綔闆绘簮闆诲:1.8 V to 3.6 V 宸ヤ綔婧害鑼冨湇:- 40 C to + 105 C 灏佽 / 绠遍珨:QFN-20 瀹夎棰�(f膿ng)鏍�:SMD/SMT
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*鍨嬭櫉(h脿o) *鏁�(sh霉)閲� 寤犲晢 鎵硅櫉(h脿o) 灏佽
娣诲姞鏇村閲囪臣(g貌u)

鎴戠殑鑱�(li谩n)绯绘柟寮�

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