[ label ] RLNCF f [,d [,a] Oper" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� PIC18F4585-I/P
寤犲晢锛� Microchip Technology
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PIC18FXX39
DS30485A-page 244
Preliminary
2002 Microchip Technology Inc.
RLNCF
Rotate Left f (no carry)
Syntax:
[ label ]
RLNCF
f [,d [,a]
Operands:
0
鈮� f 鈮� 255
d
鈭� [0,1]
a
鈭� [0,1]
Operation:
(f<n>)
鈫� dest<n+1>,
(f<7>)
鈫� dest<0>
Status Affected:
N, Z
Encoding:
0100
01da
ffff
Description:
The contents of register 'f' are
rotated one bit to the left. If 'd' is 0,
the result is placed in W. If 'd' is 1,
the result is stored back in register
'f' (default). If 鈥榓(ch菐n)鈥� is 0, the Access
Bank will be selected, overriding
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write to
destination
Example:
RLNCF
REG, 1, 0
Before Instruction
REG
=
1010 1011
After Instruction
REG
=
0101 0111
register f
RRCF
Rotate Right f through Carry
Syntax:
[ label ] RRCF f [,d [,a]
Operands:
0
鈮� f 鈮� 255
d
a
鈭� [0,1]
Operation:
(f<n>)
鈫� dest<n-1>,
(f<0>)
鈫� C,
(C)
鈫� dest<7>
Status Affected:
C, N, Z
Encoding:
0011
00da
ffff
Description:
The contents of register 'f' are
rotated one bit to the right through
the Carry Flag. If 'd' is 0, the result
is placed in W. If 'd' is 1, the result
is placed back in register 'f'
(default). If 鈥榓(ch菐n)鈥� is 0, the Access
Bank will be selected, overriding
the BSR value. If 鈥榓(ch菐n)鈥� is 1, then the
bank will be selected as per the
BSR value (default).
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register 'f'
Process
Data
Write to
destination
Example:
RRCF
REG, 0, 0
Before Instruction
REG
=
1110 0110
C=
0
After Instruction
REG
=
1110 0110
W=
0111 0011
C=
0
C
register f
鐩搁棞(gu膩n)PDF璩囨枡
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