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| 型號： | PIC17C43 |
| 英文描述： | PIC17C42/42A/43/44/CR42A/CR43 Datasheet |
| 中文描述： | PIC17C42/42A/43/44/CR42A/CR43數(shù)據(jù)表 |
| 文件頁數(shù)： | 65/71頁 |
| 文件大?。?/td> | 1173K |
| 代理商： | PIC17C43 |
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PIC17C4X
DS30412C-page 68
1996 Microchip Technology Inc.
11.1
Timer0 Operation
When the T0CS (T0STA<5>) bit is set, TMR0 incre-
ments on the internal clock. When T0CS is clear, TMR0
increments on the external clock (RA1/T0CKI pin). The
external clock edge can be congured in software.
When the T0SE (T0STA<6>) bit is set, the timer will
increment on the rising edge of the RA1/T0CKI pin.
When T0SE is clear, the timer will increment on the fall-
ing edge of the RA1/T0CKI pin. The prescaler can be
programmed to introduce a prescale of 1:1 to 1:256.
The timer increments from 0000h to FFFFh and rolls
over to 0000h. On overow, the TMR0 Interrupt Flag bit
(T0IF) is set. The TMR0 interrupt can be masked by
clearing the corresponding TMR0 Interrupt Enable bit
(T0IE). The TMR0 Interrupt Flag bit (T0IF) is automati-
cally cleared when vectoring to the TMR0 interrupt vec-
tor.
11.2
Using Timer0 with External Clock
When the external clock input is used for Timer0, it is
synchronized
with
the
internal
phase
clocks.
Figure 11-3 shows the synchronization of the external
clock. This synchronization is done after the prescaler.
The output of the prescaler (PSOUT) is sampled twice
in every instruction cycle to detect a rising or a falling
edge. The timing requirements for the external clock
are detailed in the electrical specication section for the
desired device.
11.2.1
DELAY FROM EXTERNAL CLOCK EDGE
Since the prescaler output is synchronized with the
internal clocks, there is a small delay from the time the
external clock edge occurs to the time TMR0 is actually
incremented. Figure 11-3 shows that this delay is
between 3TOSC and 7TOSC. Thus, for example, mea-
suring the interval between two edges (e.g. period) will
be accurate within
±4TOSC (±121 ns @ 33 MHz).
FIGURE 11-2: TIMER0 MODULE BLOCK DIAGRAM
FIGURE 11-3: TMR0 TIMING WITH EXTERNAL CLOCK (INCREMENT ON FALLING EDGE)
RA1/T0CKI
Synchronization
Prescaler
(8 stage
async ripple
counter)
T0SE
(T0STA<6>)
Fosc/4
T0CS
(T0STA<5>)
PS3:PS0
(T0STA<4:1>)
Q2
Q4
0
1
TMR0H<8> TMR0L<8>
Interrupt on overow
sets T0IF
(INTSTA<5>)
4
PSOUT
Q1 Q2 Q3 Q4
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
Prescaler
output
(PSOUT)
Sampled
Prescaler
output
Increment
TMR0
T0
T0 + 1
T0 + 2
(note 3)
(note 2)
Note 1: The delay from the T0CKI edge to the TMR0 increment is 3Tosc to 7Tosc.
2:
↑ = PSOUT is sampled here.
3: The PSOUT high time is too short and is missed by the sampling circuit.
(note 1)
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| PIC17C43/JW | 功能描述:8位微控制器 -MCU 64KB 3328 RAM w/ECAN RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC17C43-16/L | 功能描述:8位微控制器 -MCU 8KB 454 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC17C43-16/L | 制造商:Microchip Technology Inc 功能描述:8BIT CMOS MCU SMD 17C43 PLCC44 |
| PIC17C43-16/P | 功能描述:8位微控制器 -MCU 8KB 454 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| PIC17C43-16/P | 制造商:Microchip Technology Inc 功能描述:IC 8BIT CMOS MCU OTP 17C43 DIP40 |
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