參數(shù)資料
型號： PIC12HV615
廠商： Microchip Technology Inc.
英文描述： 8-Pin Flash-Based, 8-Bit CMOS Microcontrollers
中文描述： 8引腳閃存的基礎(chǔ)上，8位CMOS微控制器
文件頁數(shù)： 61/168頁
文件大?。?/td> 1347K
代理商： PIC12HV615
2006 Microchip Technology Inc.
Preliminary
DS41302A-page 59
PIC12F609/615/12HV609/615
8.8
Comparator Gating Timer1
This feature can be used to time the duration or interval
of analog events. Clearing the T1GSS bit of the
CMCON1 register will enable Timer1 to increment
based on the output of the comparator. This requires
that Timer1 is on and gating is enabled. See
Section 6.0 “Timer1 Module with Gate Control”
for
details.
It is recommended to synchronize the comparator with
Timer1 by setting the CMSYNC bit when the compara-
tor is used as the Timer1 gate source. This ensures
Timer1 does not miss an increment if the comparator
changes during an increment.
8.9
Synchronizing Comparator Output
to Timer1
The comparator output can be synchronized with
Timer1 by setting the CMSYNC bit of the CMCON1
register. When enabled, the comparator output is
latched on the falling edge of the Timer1 clock source.
If a prescaler is used with Timer1, the comparator
output is latched after the prescaling function. To
prevent a race condition, the comparator output is
latched on the falling edge of the Timer1 clock source
and Timer1 increments on the rising edge of its clock
source.
See
the
Comparator
(Figure 8-2) and the Timer1 Block Diagram (Figure 6-1)
for more information.
Block
Diagram
REGISTER 8-2:
CMCON1: COMPARATOR CONTROL REGISTER 1
U-0
—
U-0
—
U-0
—
R/W-0
T1ACS
R/W-0
CMHYS
U-0
—
R/W-1
T1GSS
R/W-0
CMSYNC
bit 7
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
bit 4
Unimplemented:
Read as ‘
0
’
T1ACS:
Timer1 Alternate Clock Select bit
1
= Timer 1 Clock Source is System Clock (F
OSC
)
0
= Timer 1 Clock Source is Instruction Clock (F
OSC
\4)
CMHYS:
Comparator Hysteresis Select bit
1
= Comparator Hysteresis enabled
0
= Comparator Hysteresis disabled
Unimplemented:
Read as ‘
0
’
T1GSS:
Timer1 Gate Source Select bit
(1)
1
= Timer 1 Gate Source is T1G pin (pin should be configured as digital input)
0
= Timer 1 Gate Source is comparator output
CMSYNC:
Comparator Output Synchronization bit
(2)
1
= Output is synchronized with falling edge of Timer1 clock
0
= Output is asynchronous
bit 3
bit 2
bit 1
bit 0
Note 1:
Refer to
Section 6.6 “Timer1 Gate”
.
Refer to Figure 8-2.
2:
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PIC12HV615-E/MD 功能描述:8位微控制器 -MCU 2KB Flash 64 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC12HV615-E/MF 功能描述:8位微控制器 -MCU 1.75KB Flash 64B RAM 6 I/O 8MHz INT OSC RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC12HV615-E/MS 功能描述:8位微控制器 -MCU 2KB Flash 64 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC12HV615-E/P 功能描述:8位微控制器 -MCU 2KB Flash 64 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
PIC12HV615-E/SN 功能描述:8位微控制器 -MCU 2KB Flash 64 RAM RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風格:SMD/SMT
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