參數(shù)資料
型號(hào): PI7C21P100NH
廠商: Pericom Semiconductor Corp.
英文描述: 2-PORT PCI-X BRIDGE
中文描述: 2端口PCI - X橋接
文件頁數(shù): 16/77頁
文件大?。?/td> 603K
代理商: PI7C21P100NH
PI7C21P100
2-PORT PCI-X BRIDGE
ADVANCE INFORMATION
Page 16 of 77
June 10, 2005 Revision 1.06
3.2.6
STRAPPING PINS AND MISCELLANEOUS SIGNALS
Name
S__ARB#
Pin #
T21
Type
I
Description
Internal Arbiter Enable:
This pin is used by
PI7C21P100 to determine whether the secondary bus
uses the internal arbiter or external arbiter.
0: Enable the internal arbiter
1: Disable the internal arbiter and use an external arbiter
Secondary Bus Maximum Frequency:
This pin is used
to determine the maximum frequency on the secondary
bus when in PCI-X mode. In PCI mode, the pin has no
function and should not be left floating.
0: Set secondary interface to 133MHz
1: Set secondary interface to 100MHz
Secondary Bus PCI-X Capable:
This pin is used with
S_SEL100 to determine the frequency and mode for the
secondary bus. There are three conditions for this pin
determining the capability of the secondary bus:
Ground: Not capable of PCI-X mode
Pull-down: PCI-X 66MHz
Not connected: PCI-X 133MHz
S_PCIXCAP Pull-up Driver:
This pin is used with
S_PCIXAP as part of a programmable pull-up circuit to
determine the state of S_PCIXCAP. A 1kohm resistor
must be placed between this pin and S_PCIXCAP.
Secondary Driver Mode:
This pin controls the output
impedance of the secondary drivers to account for the
number of loads on the secondary bus.
0: default impedance
1: select alternate impedance
See Table 6-2 for impedance values.
Primary Driver Mode Control:
Controls the output
impedance of the primary bus drivers to account for the
number of loads on the primary bus.
0: Default impedance
1: Select alternate impedance
S_CLK Input Stable:
Determines when the S_CLK is
stable to resolve when S_RST# can by de-asserted.
0: S_CLK is not stable
1: S_CLK is stable
Initialization Device Select:
S_IDSEL is used as a chip
select during configuration reads and writes on the
secondary bus. Applications that do not require access
to PI7C21P100’s configuration registers from the
secondary side should pull this pin LOW.
S_SEL100
V3
I
S_PCIXCAP
R23
I
S_PCIXCAP_PU
AA1
I
S_DRVR
AC7
ID
P_DRVR
E2
ID
S_CLK_STABLE
W3
I
S_IDSEL
AA22
I
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