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參數(shù)資料
| 型號： | PHN103 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 小信號晶體管 |
| 英文描述： | N-channel enhancement mode MOS transistor |
| 中文描述： | 8500 mA, 30 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, MS-012AA |
| 封裝： | PLASTIC, SO-8 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 76K |
| 代理商： | PHN103 |
1997 Jun 20
5
Philips Semiconductors
Product specification
N-channel enhancement mode
MOS transistor
PHN103
CHARACTERISTICS
T
j
= 25
°
C unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
750
520
200
25
3
7.5
MAX.
2.8
100
±
100
0.05
0.03
40
UNIT
V
(BR)DSS
V
GSth
I
DSS
I
GSS
R
DSon
drain-source breakdown voltage
gate-source threshold voltage
drain-source leakage current
gate leakage current
drain-source on-state resistance
V
GS
= 0; I
D
= 10
μ
A
V
GS
= V
DS
; I
D
= 1 mA
V
GS
= 0; V
DS
= 24 V
V
GS
=
±
20 V; V
DS
= 0
V
GS
= 4.5 V; I
D
= 2.75 A
V
GS
= 10 V; I
D
= 5.5 A
V
GS
= 0; V
DS
= 24 V; f = 1 MHz
V
GS
= 0; V
DS
= 24 V; f = 1 MHz
V
GS
= 0; V
DS
= 24 V; f = 1 MHz
V
GS
= 10 V; V
DD
= 15 V; I
D
= 4 A
V
GS
= 10 V; V
DD
= 15 V; I
D
= 4 A
V
GS
= 10 V; V
DD
= 15 V; I
D
= 4 A
30
1
V
V
nA
nA
pF
pF
pF
nC
nC
nC
C
iss
C
oss
C
rss
Q
G
Q
GS
Q
GD
input capacitance
output capacitance
reverse transfer capacitance
total gate charge
gate-source charge
gate-drain charge
Switching times
(see Fig.4)
t
d(on)
turn-on delay time
V
GS
= 0 to 10 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
V
GS
= 0 to 10 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
V
GS
= 0 to 10 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
V
GS
= 10 to 0 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
V
GS
= 10 to 0 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
V
GS
= 10 to 0 V; V
DD
= 15 V;
I
D
= 1 A; R
L
= 15
; R
gen
= 6
7
ns
t
r
rise time
10
ns
t
on
turn-on switching time
17
35
ns
t
d(off)
turn-off delay time
35
ns
t
f
fall time
40
ns
t
off
turn-off switching time
75
150
ns
Source-drain diode
V
SD
source-drain diode forward
voltage
reverse recovery time
V
GD
= 0; I
S
= 1.25 A
1
V
t
rr
I
S
= 1.25 A; di/dt = 100 A/
μ
s
70
ns
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