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參數(shù)資料
| 型號(hào)： | PHD24N03 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | TrenchMOS transistor Logic level FET |
| 中文描述： | TrenchMOS晶體管邏輯電平場(chǎng)效應(yīng)管 |
| 文件頁(yè)數(shù)： | 3/8頁(yè) |
| 文件大小： | 50K |
| 代理商： | PHD24N03 |
Philips Semiconductors
Preliminary specification
TrenchMOS
transistor
Logic level FET
PHD24N03LT
Fig.1. Normalised power dissipation.
PD% = 100
P
D
/P
D 25 C
= f(T
mb
)
Fig.2. Normalised continuous drain current.
ID% = 100
I
D
/I
D 25 C
= f(T
mb
); conditions: V
GS
≥
5 V
Fig.3. Safe operating area. T
= 25 C
I
D
& I
DM
= f(V
DS
); I
DM
single pulse; parameter t
p
Fig.4. Transient thermal impedance.
Z
th j-mb
= f(t); parameter D = t
p
/T
Fig.5. Typical output characteristics, T
j
= 25 C
.
I
D
= f(V
DS
); parameter V
GS
Fig.6. Typical on-state resistance, T
j
= 25 C
.
R
DS(ON)
= f(I
D
); parameter V
GS
0
20
40
60
80
Tmb / C
100
120
140
160
180
PD%
Normalised Power Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
1us
10us 100us
1ms
10ms
0.1s
1s
10s
0.01
0.1
1
10
0
0.2
0.1
0.05
0.02
0.5
PHP24N03T
pulse width, tp (s)
Transient thermal impedance, Zth j-mb (K/W)
D =
t
p
t
p
T
T
P
t
D
D =
0
20
40
60
80
Tmb / C
100
120
140
160
180
ID%
Normalised Current Derating
120
110
100
90
80
70
60
50
40
30
20
10
0
0
5
10
15
20
25
30
0
5
10
15
20
VGS = 2.5 V
3 V
3.5 V
PHP24N03LT
VDS, Drain-Source voltage (Volts)
ID, Drain current (Amps)
5 V
15 V
Tj = 25 C
1
10
100
1
10
100
PHP24N03T
VDS, Drain-source voltage (Volts)
ID, Drain current (Amps)
RDSON =VDSID
100 us
1 ms
10 ms
DC
10 us
Tmb = 25 C
0
5
10
15
20
0
0.02
0.04
0.06
0.08
0.1
0.12
PHP24N03LT
ID, Drain current (Amps)
RDS(on), Drain-Source on resistance (Ohms)
VGS = 2.5 V
3 V
3.5 V
5 V
15 V
Tj = 25 C
December 1999
3
Rev 1.100
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