參數(shù)資料
型號(hào)： PCD5013H
廠商： NXP SEMICONDUCTORS
元件分類： 尋呼電路
英文描述： FLEX roaming decoder II
中文描述： TELECOM, PAGING DECODER, PQFP32
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, SOT-358-1, LQFP-32
文件頁數(shù)： 9/76頁
文件大小： 270K
代理商： PCD5013H
1999 Apr 12
9
Philips Semiconductors
Product specification
FLEX
roaming decoder II
PCD5013
8.3
Serial Peripheral Interface (SPI)
8.3.1
G
ENERAL
All data communication between the PCD5013 and the
host is done via the SPI using 32-bit data packets at data
rates up to 1 Mbits/s. SPI transfers are full-duplex and can
be initiated by either the host which acts as the SPI master
providing the data clock for packet transfer, or the
PCD5013 as an SPI slave.
The host can send packets to configure or control the
PCD5013 or a checksum packet to validate SPI
communication (Section 8.4.2). The PCD5013 buffers
data packets, relating to received data, into a 32 packet
transmit buffer. The PCD5013 can send either a status
packet, a part ID packet, or packets from the transmit
buffer. In the event of a buffer overflow, the PCD5013
stops decoding and clears the transmit buffer.
8.3.2
SPI
INTERCONNECT
Connection on the PCD5013 consists of a READY pin and
4 SPI pins (SS, SCK, MOSI and MISO):
READY: output signal; indicates that data is available
from the PCD5013
SS: SPI select; used as PCD5013 chip select
SCK: serial clock; output from the host used for clocking
data
MOSI: master output slave input; data output from the
host
MISO: master input slave output; data output from the
PCD5013.
8.3.3
SPI
TRANSFER INITIATED BY THE HOST
The following steps occur when the host initiates an SPI
packet transfer, see Fig.5 for event timings:
1.
The host selects the PCD5013 by driving the
SS pin LOW.
2.
The PCD5013 indicates that it is ready to start the
SPI transfer by driving the READY pin LOW.
The host clocks each of the 32 bits of the SPI packet
by pulsing SCK. Both the host and the PCD5013
sample data on the rising edge of SCK. Packets are
sent MSB first.
The PCD5013 pulls the READY line HIGH, to indicate
that the transfer is complete.
The host waits until the READY line is pulled HIGH,
then de-selects the PCD5013 SPI by driving the
SS pin HIGH.
The first 5 steps are repeated for each additional
packet.
3.
4.
5.
6.
8.3.4
SPI
TRANSFER INITIATED BY THE DECODER
The following steps occur when the PCD5013 initiates an
SPI packet transfer, see Fig.6 for event timings:
1.
The PCD5013 initiates the SPI transfer by driving the
READY pin LOW.
2.
If the PCD5013 is not already selected, the host
selects the PCD5013 SPI by driving the SS pin LOW.
3.
The host clocks each of the 32 bits of the SPI packet
by pulsing SCK. Both the host and the PCD5013
sample data on the rising edge of SCK. Packets are
sent MSB first.
4.
The PCD5013 pulls the READY line HIGH, to indicate
that the transfer is complete.
5.
The host may then either de-select the SPI interface of
the PCD5013 (Fig.7) by driving the SS pin HIGH or
maintain SS LOW to continue sending packets to the
PCD5013.
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