1999 Apr 12
53
Philips Semiconductors
Product specification
FLEX
roaming decoder II
PCD5013
8.8
Message reception
8.8.1
FLEX
SIGNAL STRUCTURE
The FLEX
signal transmitted on the radio channel (see
Fig.18) consists of a series of four minute cycles, each
cycle having 128 frames at 1.875 seconds per frame.
A pager may be assigned to process any number of the
frames. Battery saving is performed for frames which are
not assigned. The FLEX
signal can assign additional
frames to the pager using collapse, fragmentation,
temporary addressing or carry-on information within the
FLEX
signal.
Each FLEX
frame has a synchronization portion followed
by an eleven block data portion, each block lasting
160 milliseconds. The synchronization portion indicates
the rate at which the data portion is transmitted,
1600, 3200 or 6400 bits per second (bps). The 1600 bps
rate is transmitted at 1600 symbols per second (sps)
using 2 level FSK modulation and consists of a single
phase of information at 1600 bps, phase-A. The 3200 bps
rate is transmitted at either 1600 sps using 4 level FSK
modulation or 3200 sps using 2 level FSK modulation and
consists of two concurrent phases of information at
1600 bps, phase-A and phase-C. The 6400 bps rate is
transmitted at 3200 sps using 4 level FSK modulation and
consists of four concurrent phases of information at
1600 bps (phase-A, -B, -C and -D).
Each block has eight interleaved words per phase, thus
there are 88 codewords (numbered 0 to 87) per phase in
every frame. Each word has information contained within
an error correcting code which allows for bit error
correction and detection. The 88 words in each phase are
organized into a block information field, an address field, a
vector field, a message field, and an idle field.
The boundaries between the fields are independent of the
block boundaries. Furthermore, at 3200 and 6400 bps,
the information in one phase is independent of the
information in a concurrent phase, and the boundaries
between the fields of one phase are unrelated to the
boundaries between the fields in a concurrent phase.
The synchronization portion consists of: a first sync signal
at 1600 bps; a frame information word having the frame
number 0 to 127 (7 bits) and the cycle number
0 to 14 (4 bits); and a second sync signal at the data rate
of the interleaved portion.
The block information field contains BIWs. These can be
used for determining time and date information and certain
paging system information.
The address field contains addresses assigned to paging
devices. Addresses are used to identify information sent to
individual paging devices and/or groups of paging devices.
Information in the FLEX
signal may indicate that an
address is a priority address. An address may be either a
short (one word) address or a long (two word) address.
An address may be a tone-only address in which case
there is no additional information associated with the
address. If an address is not a tone-only address, then
there is an associated vector word in the vector field.
Information in the FLEX
signal indicates the location of
the vector word in the vector field associated with the
address. A pager may perform battery saving at the end of
the address field when its address(es) is not detected.
The vector field consists of a series of vector words.
Depending upon the type of message, a vector word (or
words in the case of a long address) may either contain all
of the information necessary for the message, or indicate
the location of message words in the message field
comprising the message information. Short addresses
have one associated vector word in the vector field. Long
addresses have one associated vector word in the vector
field directly followed by the first message codeword of the
call.
The message field consists of a series of information
words containing message information. The message
information may be formatted in ASCII, BCD or binary
depending upon the message type.