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參數(shù)資料
| 型號(hào)： | P12C508 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8-Pin, 8-Bit CMOS Microcontroller |
| 中文描述： | 8引腳，8位CMOS微控制器 |
| 文件頁(yè)數(shù)： | 32/84頁(yè) |
| 文件大?。?/td> | 526K |
| 代理商： | P12C508 |
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PIC12C5XX
DS40139A-page 32
Advanced Information
1996 Microchip Technology Inc.
7.5
Device Reset Timer (DRT)
In the PIC12C5XX, the DRT runs any time the device
is powered up. DRT runs from RESET only in XT and
LP modes. It is disabled from RESET in INTRC and
EXTRC modes.
The Device Reset Timer (DRT) provides a fixed 18 ms
nominal time-out on reset. The DRT operates on an
internal RC oscillator. The processor is kept in RESET
as long as the DRT is active. The DRT delay allows
V
DD
to rise above V
DD
min., and for the oscillator to
stabilize.
Oscillator circuits based on crystals or ceramic
resonators require a certain time after power-up to
establish a stable oscillation. The on-chip DRT keeps
the device in a RESET condition for approximately 18
ms after the voltage on the GP3/MCLR/V
PP
pin has
reached a logic high (V
IHMC
) level. Thus, external RC
networks connected to the MCLR input are not
required in most cases, allowing for savings in cost-
sensitive and/or space restricted applications.
The Device Reset time delay will vary from chip to chip
due to V
DD
, temperature, and process variation. See
AC parameters for details.
The DRT will also be triggered upon a Watchdog
Timer time-out (only in XT and LP modes). This is
particularly important for applications using the WDT
to wake from SLEEP mode automatically.
7.6
Watchdog Timer (WDT)
The Watchdog Timer (WDT) is a free running on-chip
RC oscillator which does not require any external
components. This RC oscillator is separate from the
external RC oscillator of the GP5/OSC1/CLKIN pin
and the internal 4 MHz oscillator. That means that the
WDT will run even if the clock on the GP5/OSC1/
CLKIN and GP4/OSC2 pins have been stopped, for
example, by execution of a
SLEEP
instruction. During
normal operation or SLEEP, a WDT reset or wake-up
reset generates a device RESET.
The TO bit (STATUS<4>) will be cleared upon a
Watchdog Timer reset.
The WDT can be permanently disabled by
programming the configuration bit WDTE as a '0'
(Section 7.1). Refer to the PIC12C5XX Programming
Specifications to determine how to access the
configuration word.
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