
PIC12C5XX
DS40139A-page 22
Advance Information
1996 Microchip Technology Inc.
FIGURE 6-2:
TIMER0 TIMING: INTERNAL CLOCK/NO PRESCALE
FIGURE 6-3:
TIMER0 TIMING: INTERNAL CLOCK/PRESCALE 1:2
TABLE 6-1:
REGISTERS ASSOCIATED WITH TIMER0
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3 Bit 2 Bit 1 Bit 0
Value on
Power-On
Reset
Value on
MCLR and
WDT Reset
Value on
Wake-up on
Pin Change
01h
N/A
TMR0
OPTION GPWU GPPU T0CS T0SE PSA
Timer0 - 8-bit real-time clock/counter
xxxx xxxx uuuu uuuu uuuu uuuu
PS0
1111 1111 1111 1111
PS2
PS1
1111 1111
N/A
Legend: Shaded cells not used by Timer0,
-
= unimplemented,
x
= unknown,
u
= unchanged,
TRIS
I/O control registers
--11 1111 --11 1111 --11 1111
PC-1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC
(Program
Counter)
Instruction
Fetch
Timer0
PC
PC+1
PC+2
PC+3
PC+4
PC+5
PC+6
T0
T0+1
T0+2
NT0
NT0
NT0
NT0+1
NT0+2
MOVWF TMR0
MOVF TMR0,W
MOVF TMR0,W
MOVF TMR0,W
MOVF TMR0,W
MOVF TMR0,W
Write TMR0
executed
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0 + 1
Read TMR0
reads NT0 + 2
Instruction
Executed
PC-1
Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4 Q1 Q2 Q3 Q4
PC
(Program
Counter)
Instruction
Fetch
Timer0
PC
PC+1
PC+2
PC+3
PC+4
PC+5
PC+6
T0
NT0+1
MOVWF TMR0
MOVF TMR0,W
MOVF TMR0,W
MOVF TMR0,W
MOVF TMR0,W
MOVF TMR0,W
Write TMR0
executed
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0
Read TMR0
reads NT0 + 1
T0+1
NT0
Instruction
Execute
T0