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| 型號： | P12C508 |
| 廠商： | Microchip Technology Inc. |
| 英文描述： | 8-Pin, 8-Bit CMOS Microcontroller |
| 中文描述： | 8引腳，8位CMOS微控制器 |
| 文件頁數(shù)： | 28/84頁 |
| 文件大小： | 526K |
| 代理商： | P12C508 |
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PIC12C5XX
DS40139A-page 28
Advance Information
1996 Microchip Technology Inc.
FIGURE 7-6:
RC OSCILLATOR MODE
7.2.5
INTERNAL 4 MHZ RC OSCILLATOR
The internal RC oscillator provides a fixed 4 MHz (nom-
inal) system clock.
In addition, a calibration instruction is programmed into
the top of memory which indicates the calibration value
for the internal RC oscillator. This value, OSCCAL, is
programmed as a
MOVLW XX
instruction where XX is the
calibration value, and is placed at the reset vector. This
will load the W register with the calibration value upon
reset and the PC will then roll over to 0x000. The user
then has the option of writing the value to the OSCCAL
Register (05h) or ignoring it.
V
DD
Rext
Cext
V
SS
OSC1
Internal
clock
PIC12C5XX
N
7.3
RESET
The device differentiates between various kinds of
reset:
a) Power on reset (POR)
b) MCLR reset during normal operation
c) MCLR reset during SLEEP
d) WDT time-out reset during normal operation
e) WDT time-out reset during SLEEP
f) Wake-up from SLEEP on pin change
Some registers are not reset in any way; they are
unknown on POR and unchanged in any other reset.
Most other registers are reset to “reset state” on power-
on reset (POR), on MCLR or WDT reset during normal
operation . They are not affected by a WDT reset during
SLEEP or MCLR reset during SLEEP, since these
resets are viewed as resumption of normal operation.
The exceptions to this are TO, PD, and GPWUF bits.
They are set or cleared differently in different reset sit-
uations. These bits are used in software to determine
the nature of reset. See Table 7-3 for a full description
of reset states of all registers.
TABLE 7-3:
RESET CONDITIONS FOR REGISTERS
Register
Address
Power-on Reset
MCLR Reset
WDT time-out
Wake-up on Pin Change
W
—
00h
01h
02h
03h
04h
04h
05h
06h
—
—
qqqq xxxx (1)
qqqq uuuu (1)
INDF
TMR0
PC
STATUS
FSR (12C508)
FSR (12C509)
OSCCAL
GPIO
OPTION
TRIS
Legend:
u
= unchanged,
x
= unknown,
-
= unimplemented bit, read as ‘0’,
= value depends on condition.
Note 1:
Bits <7:4> of W register contain oscillator calibration (OSCCAL) values due to
MOVLW XX
instruction at
top of memory.
Note 2:
See Table 7-6 for reset value for specific conditions
xxxx xxxx
uuuu uuuu
xxxx xxxx
uuuu uuuu
1111 1111
1111 1111
0001 1xxx
00 uuu (2)
111x xxxx
111u uuuu
110x xxxx
11uu uuuu
0111 ----
uuuu ----
--xx xxxx
--uu uuuu
1111 1111
1111 1111
--11 1111
--11 1111
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