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參數(shù)資料
| 型號： | OX16PCI954 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated Quad UART and PCI interface |
| 中文描述： | 綜合四UART和PCI接口 |
| 文件頁數(shù)： | 61/72頁 |
| 文件大?。?/td> | 656K |
| 代理商： | OX16PCI954 |
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13 AC E
LECTRICAL
C
HARACTERISTICS
Data Sheet Revision 1.3
Page 61
OX16PCI954
OXFORD SEMICONDUCTOR LTD.
13.1 PCI Bus
The timngs for PCI pins comply with PCI Specification for the 5.0 Volt signalling environment.
13.2 Local Bus
By default, the Local bus control signals change state in the cycle immediately following the reference cycle, with offsets to
provide setup and hold times for common peripherals in Intel mode. The tables below show these default values; however each
of these can be increased or decreased by an number of PCI clock cycles by adjusting the parameters in registers LT1 and LT2.
Symbol
Parameter
t
ref
IRDY# falling to reference LBCLK
t
za
Reference LBCLK to Address Valid
t
ard
Address Valid to LBRD#falling
t
zrcs1
Reference LBCLK to LBCS#falling
t
zrcs2
Reference LBCLK to LBCS#rising
t
csrd
LBCS#falling to LBRD#falling
t
rdcs
LBRD#rising to LBCS#rising
t
zrd1
Reference LBCLK to LBRD#falling
t
zrd2
Reference LBCLK to LBRD#rising
t
drd
Data bus floating to LBRD#falling
t
zd1
Reference LBCLK to data bus floating at the start of the read
transaction
t
zd2
Reference LBCLK to data bus driven by OX16PCI954 at the end of the
read transaction
t
sd
Data bus valid to LBRD#rising
t
hd
Data bus valid after LBRD#rising
Min
Nomnally 2 PCI clock cycles
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
TBD
TBD
ns
TBD
TBD
TBD
TBD
ns
ns
Table 42: Read operation from Intel-type Local Bus
Symbol
t
ref
t
za
t
awr
t
zwcs1
t
zwcs2
t
cswr
t
wrcs
t
zwr1
t
zwr2
t
zdv
t
zdf
t
wrdi
Parameter
IRDY# falling to reference LBCLK
Reference LBCLK to Address Valid
Address Valid to LBWR#falling
Reference LBCLK to LBCS#falling
Reference LBCLK to LBCS#rising
LBCS#falling to LBWR#falling
LBWR#rising to LBCS#rising
Reference LBCLK to LBWR#falling
Reference LBCLK to LBWR#rising
Reference LBCLK to data bus valid
Reference LBCLK to data bus high-impedance
LBWR#rising to data bus invalid
Min
Nomnally 2 PCI clock cycles
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Max
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Table 43: Write operation to Intel-type Local Bus
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| OX16PCI954-TQC60-A | Integrated Quad UART and PCI interface |
| OX4240 | OCXO |
| OX1040 | OCXO |
| OX1041 | OCXO |
| OX1042 | OCXO |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| OX16PCI954_05 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI954-TQA1G | 功能描述:外圍驅(qū)動器與原件 - PCI PCI bridge to quad serial & para. port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray |
| OX16PCI954-TQC60-A | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI954-TQC60-A1 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Integrated Quad UART and PCI interface |
| OX16PCI958 | 制造商:OXFORD 制造商全稱:OXFORD 功能描述:Octal UART with PCI Interface |
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